602 lines
20 KiB
LLVM
602 lines
20 KiB
LLVM
; RUN: opt -instcombine -S < %s | FileCheck %s
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; --------------------------------------------------------------------
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; llvm.amdgcn.rcp
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; --------------------------------------------------------------------
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declare float @llvm.amdgcn.rcp.f32(float) nounwind readnone
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declare double @llvm.amdgcn.rcp.f64(double) nounwind readnone
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; CHECK-LABEL: @test_constant_fold_rcp_f32_1
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; CHECK-NEXT: ret float 1.000000e+00
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define float @test_constant_fold_rcp_f32_1() nounwind {
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%val = call float @llvm.amdgcn.rcp.f32(float 1.0) nounwind readnone
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_rcp_f64_1
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; CHECK-NEXT: ret double 1.000000e+00
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define double @test_constant_fold_rcp_f64_1() nounwind {
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%val = call double @llvm.amdgcn.rcp.f64(double 1.0) nounwind readnone
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_rcp_f32_half
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; CHECK-NEXT: ret float 2.000000e+00
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define float @test_constant_fold_rcp_f32_half() nounwind {
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%val = call float @llvm.amdgcn.rcp.f32(float 0.5) nounwind readnone
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_rcp_f64_half
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; CHECK-NEXT: ret double 2.000000e+00
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define double @test_constant_fold_rcp_f64_half() nounwind {
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%val = call double @llvm.amdgcn.rcp.f64(double 0.5) nounwind readnone
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_rcp_f32_43
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; CHECK-NEXT: call float @llvm.amdgcn.rcp.f32(float 4.300000e+01)
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define float @test_constant_fold_rcp_f32_43() nounwind {
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%val = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) nounwind readnone
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_rcp_f64_43
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; CHECK-NEXT: call double @llvm.amdgcn.rcp.f64(double 4.300000e+01)
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define double @test_constant_fold_rcp_f64_43() nounwind {
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%val = call double @llvm.amdgcn.rcp.f64(double 4.300000e+01) nounwind readnone
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ret double %val
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}
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; --------------------------------------------------------------------
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; llvm.amdgcn.frexp.mant
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; --------------------------------------------------------------------
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declare float @llvm.amdgcn.frexp.mant.f32(float) nounwind readnone
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declare double @llvm.amdgcn.frexp.mant.f64(double) nounwind readnone
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_undef(
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; CHECK-NEXT: ret float undef
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define float @test_constant_fold_frexp_mant_f32_undef() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float undef)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_undef(
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; CHECK-NEXT: ret double undef
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define double @test_constant_fold_frexp_mant_f64_undef() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double undef)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_0(
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; CHECK-NEXT: ret float 0.000000e+00
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define float @test_constant_fold_frexp_mant_f32_0() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 0.0)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_0(
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; CHECK-NEXT: ret double 0.000000e+00
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define double @test_constant_fold_frexp_mant_f64_0() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 0.0)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_n0(
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; CHECK-NEXT: ret float -0.000000e+00
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define float @test_constant_fold_frexp_mant_f32_n0() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float -0.0)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_n0(
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; CHECK-NEXT: ret double -0.000000e+00
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define double @test_constant_fold_frexp_mant_f64_n0() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double -0.0)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_1(
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; CHECK-NEXT: ret float 5.000000e-01
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define float @test_constant_fold_frexp_mant_f32_1() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 1.0)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_1(
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; CHECK-NEXT: ret double 5.000000e-01
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define double @test_constant_fold_frexp_mant_f64_1() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 1.0)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_n1(
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; CHECK-NEXT: ret float -5.000000e-01
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define float @test_constant_fold_frexp_mant_f32_n1() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float -1.0)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_n1(
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; CHECK-NEXT: ret double -5.000000e-01
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define double @test_constant_fold_frexp_mant_f64_n1() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double -1.0)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_nan(
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; CHECK-NEXT: ret float 0x7FF8000000000000
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define float @test_constant_fold_frexp_mant_f32_nan() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 0x7FF8000000000000)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_nan(
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; CHECK-NEXT: ret double 0x7FF8000000000000
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define double @test_constant_fold_frexp_mant_f64_nan() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 0x7FF8000000000000)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_inf(
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; CHECK-NEXT: ret float 0x7FF0000000000000
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define float @test_constant_fold_frexp_mant_f32_inf() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 0x7FF0000000000000)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_inf(
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; CHECK-NEXT: ret double 0x7FF0000000000000
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define double @test_constant_fold_frexp_mant_f64_inf() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 0x7FF0000000000000)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_ninf(
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; CHECK-NEXT: ret float 0xFFF0000000000000
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define float @test_constant_fold_frexp_mant_f32_ninf() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 0xFFF0000000000000)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_ninf(
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; CHECK-NEXT: ret double 0xFFF0000000000000
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define double @test_constant_fold_frexp_mant_f64_ninf() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 0xFFF0000000000000)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_max_num(
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; CHECK-NEXT: ret float 0x3FEFFFFFE0000000
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define float @test_constant_fold_frexp_mant_f32_max_num() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 0x47EFFFFFE0000000)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_max_num(
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; CHECK-NEXT: ret double 0x3FEFFFFFFFFFFFFF
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define double @test_constant_fold_frexp_mant_f64_max_num() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 0x7FEFFFFFFFFFFFFF)
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ret double %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f32_min_num(
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; CHECK-NEXT: ret float 5.000000e-01
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define float @test_constant_fold_frexp_mant_f32_min_num() nounwind {
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%val = call float @llvm.amdgcn.frexp.mant.f32(float 0x36A0000000000000)
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ret float %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_mant_f64_min_num(
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; CHECK-NEXT: ret double 5.000000e-01
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define double @test_constant_fold_frexp_mant_f64_min_num() nounwind {
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%val = call double @llvm.amdgcn.frexp.mant.f64(double 4.940656e-324)
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ret double %val
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}
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; --------------------------------------------------------------------
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; llvm.amdgcn.frexp.exp
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; --------------------------------------------------------------------
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declare i32 @llvm.amdgcn.frexp.exp.f32(float) nounwind readnone
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declare i32 @llvm.amdgcn.frexp.exp.f64(double) nounwind readnone
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_undef(
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; CHECK-NEXT: ret i32 undef
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define i32 @test_constant_fold_frexp_exp_f32_undef() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float undef)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_undef(
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; CHECK-NEXT: ret i32 undef
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define i32 @test_constant_fold_frexp_exp_f64_undef() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double undef)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_n0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_n0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float -0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_n0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_n0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double -0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f32_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f64_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_n1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f32_n1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float -1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_n1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f64_n1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double -1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_1_1024(
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; CHECK-NEXT: ret i32 -9
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define i32 @test_constant_fold_frexp_exp_f32_1_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0.0009765625)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_1_1024(
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; CHECK-NEXT: ret i32 -9
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define i32 @test_constant_fold_frexp_exp_f64_1_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0.0009765625)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_nan(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_nan() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x7FF8000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_nan(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_nan() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0x7FF8000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_inf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_inf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x7FF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_inf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_inf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0x7FF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_ninf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_ninf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0xFFF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_ninf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_ninf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0xFFF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_max_num(
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; CHECK-NEXT: ret i32 128
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define i32 @test_constant_fold_frexp_exp_f32_max_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x47EFFFFFE0000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_max_num(
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; CHECK-NEXT: ret i32 1024
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define i32 @test_constant_fold_frexp_exp_f64_max_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0x7FEFFFFFFFFFFFFF)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_min_num(
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; CHECK-NEXT: ret i32 -148
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define i32 @test_constant_fold_frexp_exp_f32_min_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x36A0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_min_num(
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; CHECK-NEXT: ret i32 -1073
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define i32 @test_constant_fold_frexp_exp_f64_min_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 4.940656e-324)
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ret i32 %val
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}
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; --------------------------------------------------------------------
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; llvm.amdgcn.class
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; --------------------------------------------------------------------
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declare i1 @llvm.amdgcn.class.f32(float, i32) nounwind readnone
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declare i1 @llvm.amdgcn.class.f64(double, i32) nounwind readnone
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; CHECK-LABEL: @test_class_undef_mask_f32(
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; CHECK: ret i1 false
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define i1 @test_class_undef_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 undef)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_over_max_mask_f32(
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; CHECK: %val = call i1 @llvm.amdgcn.class.f32(float %x, i32 1)
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define i1 @test_class_over_max_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 1025)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_no_mask_f32(
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; CHECK: ret i1 false
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define i1 @test_class_no_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 0)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_full_mask_f32(
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; CHECK: ret i1 true
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define i1 @test_class_full_mask_f32(float %x) nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 1023)
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ret i1 %val
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}
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; CHECK-LABEL: @test_class_undef_no_mask_f32(
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; CHECK: ret i1 false
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define i1 @test_class_undef_no_mask_f32() nounwind {
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%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 0)
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ret i1 %val
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}
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|
; CHECK-LABEL: @test_class_undef_full_mask_f32(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_class_undef_full_mask_f32() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 1023)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_class_undef_val_f32(
|
|
; CHECK: ret i1 undef
|
|
define i1 @test_class_undef_val_f32() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 4)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_class_undef_undef_f32(
|
|
; CHECK: ret i1 undef
|
|
define i1 @test_class_undef_undef_f32() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 undef)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_class_var_mask_f32(
|
|
; CHECK: %val = call i1 @llvm.amdgcn.class.f32(float %x, i32 %mask)
|
|
define i1 @test_class_var_mask_f32(float %x, i32 %mask) nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 %mask)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_class_isnan_f32(
|
|
; CHECK: %val = fcmp uno float %x, 0.000000e+00
|
|
define i1 @test_class_isnan_f32(float %x) nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 3)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_snan_test_snan_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_snan_test_snan_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000001, i32 1)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_qnan_test_qnan_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_qnan_test_qnan_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 2)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_qnan_test_snan_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_qnan_test_snan_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 1)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_ninf_test_ninf_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_ninf_test_ninf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0xFFF0000000000000, i32 4)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_pinf_test_ninf_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_pinf_test_ninf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000000, i32 4)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_qnan_test_ninf_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_qnan_test_ninf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 4)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_snan_test_ninf_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_snan_test_ninf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000001, i32 4)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_nnormal_test_nnormal_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_nnormal_test_nnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double -1.0, i32 8)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_pnormal_test_nnormal_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_pnormal_test_nnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 1.0, i32 8)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_nsubnormal_test_nsubnormal_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_nsubnormal_test_nsubnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x800fffffffffffff, i32 16)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_psubnormal_test_nsubnormal_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_psubnormal_test_nsubnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x000fffffffffffff, i32 16)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_nzero_test_nzero_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_nzero_test_nzero_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double -0.0, i32 32)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_pzero_test_nzero_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_pzero_test_nzero_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0.0, i32 32)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_pzero_test_pzero_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_pzero_test_pzero_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0.0, i32 64)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_nzero_test_pzero_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_nzero_test_pzero_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double -0.0, i32 64)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_psubnormal_test_psubnormal_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_psubnormal_test_psubnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x000fffffffffffff, i32 128)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_nsubnormal_test_psubnormal_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_nsubnormal_test_psubnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x800fffffffffffff, i32 128)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_pnormal_test_pnormal_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_pnormal_test_pnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 1.0, i32 256)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_nnormal_test_pnormal_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_nnormal_test_pnormal_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double -1.0, i32 256)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_pinf_test_pinf_f64(
|
|
; CHECK: ret i1 true
|
|
define i1 @test_constant_class_pinf_test_pinf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000000, i32 512)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_ninf_test_pinf_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_ninf_test_pinf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0xFFF0000000000000, i32 512)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_qnan_test_pinf_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_qnan_test_pinf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF8000000000000, i32 512)
|
|
ret i1 %val
|
|
}
|
|
|
|
; CHECK-LABEL: @test_constant_class_snan_test_pinf_f64(
|
|
; CHECK: ret i1 false
|
|
define i1 @test_constant_class_snan_test_pinf_f64() nounwind {
|
|
%val = call i1 @llvm.amdgcn.class.f64(double 0x7FF0000000000001, i32 512)
|
|
ret i1 %val
|
|
}
|