120 lines
3.5 KiB
LLVM
120 lines
3.5 KiB
LLVM
; RUN: opt -basicaa -print-memoryssa -verify-memoryssa -analyze < %s 2>&1 | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
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;
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; Ensures that atomic loads count as MemoryDefs
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; CHECK-LABEL: define i32 @foo
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define i32 @foo(i32* %a, i32* %b) {
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: store i32 4
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store i32 4, i32* %a, align 4
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; CHECK: 2 = MemoryDef(1)
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; CHECK-NEXT: %1 = load atomic i32
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%1 = load atomic i32, i32* %b acquire, align 4
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; CHECK: MemoryUse(2)
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; CHECK-NEXT: %2 = load i32
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%2 = load i32, i32* %a, align 4
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%3 = add i32 %1, %2
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ret i32 %3
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}
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; CHECK-LABEL: define void @bar
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define void @bar(i32* %a) {
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; CHECK: MemoryUse(liveOnEntry)
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; CHECK-NEXT: load atomic i32, i32* %a unordered, align 4
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load atomic i32, i32* %a unordered, align 4
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: load atomic i32, i32* %a monotonic, align 4
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load atomic i32, i32* %a monotonic, align 4
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; CHECK: 2 = MemoryDef(1)
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; CHECK-NEXT: load atomic i32, i32* %a acquire, align 4
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load atomic i32, i32* %a acquire, align 4
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; CHECK: 3 = MemoryDef(2)
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; CHECK-NEXT: load atomic i32, i32* %a seq_cst, align 4
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load atomic i32, i32* %a seq_cst, align 4
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ret void
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}
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; CHECK-LABEL: define void @baz
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define void @baz(i32* %a) {
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: %1 = load atomic i32
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%1 = load atomic i32, i32* %a acquire, align 4
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; CHECK: MemoryUse(1)
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; CHECK-NEXT: %2 = load atomic i32, i32* %a unordered, align 4
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%2 = load atomic i32, i32* %a unordered, align 4
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; CHECK: 2 = MemoryDef(1)
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; CHECK-NEXT: %3 = load atomic i32, i32* %a monotonic, align 4
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%3 = load atomic i32, i32* %a monotonic, align 4
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ret void
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}
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; CHECK-LABEL: define void @fences
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define void @fences(i32* %a) {
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: fence acquire
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fence acquire
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; CHECK: MemoryUse(1)
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; CHECK-NEXT: %1 = load i32, i32* %a
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%1 = load i32, i32* %a
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; CHECK: 2 = MemoryDef(1)
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; CHECK-NEXT: fence release
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fence release
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; CHECK: MemoryUse(2)
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; CHECK-NEXT: %2 = load i32, i32* %a
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%2 = load i32, i32* %a
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; CHECK: 3 = MemoryDef(2)
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; CHECK-NEXT: fence acq_rel
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fence acq_rel
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; CHECK: MemoryUse(3)
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; CHECK-NEXT: %3 = load i32, i32* %a
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%3 = load i32, i32* %a
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; CHECK: 4 = MemoryDef(3)
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; CHECK-NEXT: fence seq_cst
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fence seq_cst
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; CHECK: MemoryUse(4)
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; CHECK-NEXT: %4 = load i32, i32* %a
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%4 = load i32, i32* %a
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ret void
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}
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; CHECK-LABEL: define void @seq_cst_clobber
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define void @seq_cst_clobber(i32* noalias %a, i32* noalias %b) {
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: %1 = load atomic i32, i32* %a monotonic, align 4
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load atomic i32, i32* %a monotonic, align 4
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; CHECK: 2 = MemoryDef(1)
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; CHECK-NEXT: %2 = load atomic i32, i32* %a seq_cst, align 4
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load atomic i32, i32* %a seq_cst, align 4
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; CHECK: 3 = MemoryDef(2)
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; CHECK-NEXT: load atomic i32, i32* %a monotonic, align 4
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load atomic i32, i32* %a monotonic, align 4
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ret void
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}
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; Ensure that AA hands us MRI_Mod on unreorderable atomic ops.
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;
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; This test is a bit implementation-specific. In particular, it depends on that
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; we pass cmpxchg-load queries to AA, without trying to reason about them on
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; our own.
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;
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; If AA gets more aggressive, we can find another way.
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;
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; CHECK-LABEL: define void @check_aa_is_sane
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define void @check_aa_is_sane(i32* noalias %a, i32* noalias %b) {
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: cmpxchg i32* %a, i32 0, i32 1 acquire acquire
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cmpxchg i32* %a, i32 0, i32 1 acquire acquire
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; CHECK: MemoryUse(1)
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; CHECK-NEXT: load i32, i32* %b, align 4
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load i32, i32* %b, align 4
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ret void
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}
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