153 lines
3.9 KiB
LLVM
153 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
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; Fold
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; ptr - (ptr & C)
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; To
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; ptr & (~C)
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;
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; This needs to be a backend-level fold because only by now pointers
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; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()
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; intrinsic which is not sufficiently widely-spread yet.
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;
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; https://bugs.llvm.org/show_bug.cgi?id=44448
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; The basic positive tests
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define i32 @t0_32(i32 %ptr) nounwind {
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; X86-LABEL: t0_32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t0_32:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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%bias = and i32 %ptr, 15
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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define i64 @t1_64(i64 %ptr) nounwind {
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; X86-LABEL: t1_64:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t1_64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: andq $-16, %rax
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; X64-NEXT: retq
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%bias = and i64 %ptr, 15
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%r = sub i64 %ptr, %bias
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ret i64 %r
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}
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define i32 @t2_powerof2(i32 %ptr) nounwind {
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; X86-LABEL: t2_powerof2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-17, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t2_powerof2:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-17, %eax
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; X64-NEXT: retq
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%bias = and i32 %ptr, 16
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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define i32 @t3_random_constant(i32 %ptr) nounwind {
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; X86-LABEL: t3_random_constant:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $-43, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t3_random_constant:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $-43, %eax
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; X64-NEXT: retq
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%bias = and i32 %ptr, 42
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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; Extra use tests
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define i32 @t4_extrause(i32 %ptr, ptr %bias_storage) nounwind {
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; X86-LABEL: t4_extrause:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, %edx
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; X86-NEXT: andl $15, %edx
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: andl $-16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t4_extrause:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: movl %edi, %ecx
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; X64-NEXT: andl $15, %ecx
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; X64-NEXT: movl %ecx, (%rsi)
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; X64-NEXT: andl $-16, %eax
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; X64-NEXT: retq
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%bias = and i32 %ptr, 15
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store i32 %bias, ptr %bias_storage
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%r = sub i32 %ptr, %bias
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ret i32 %r
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}
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; Negative tests
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define i32 @n5_different_ptrs(i32 %ptr0, i32 %ptr1) nounwind {
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; X86-LABEL: n5_different_ptrs:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: andl $15, %ecx
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; X86-NEXT: subl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n5_different_ptrs:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $15, %esi
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; X64-NEXT: subl %esi, %eax
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; X64-NEXT: retq
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%bias = and i32 %ptr1, 15 ; not %ptr0
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%r = sub i32 %ptr0, %bias ; not %ptr1
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ret i32 %r
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}
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define i32 @n6_sub_is_not_commutative(i32 %ptr) nounwind {
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; X86-LABEL: n6_sub_is_not_commutative:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: andl $15, %eax
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; X86-NEXT: subl %ecx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: n6_sub_is_not_commutative:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $15, %eax
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; X64-NEXT: subl %edi, %eax
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; X64-NEXT: retq
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%bias = and i32 %ptr, 15
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%r = sub i32 %bias, %ptr ; wrong order
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ret i32 %r
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}
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