33 lines
1.1 KiB
LLVM
33 lines
1.1 KiB
LLVM
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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; PR16133 - we must treat XMM registers as v4f32 as SSE1 targets don't permit other vector types.
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define void @nop() nounwind {
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; X32-LABEL: nop:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: andl $-16, %esp
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; X32-NEXT: subl $32, %esp
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; X32-NEXT: #APP
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; X32-NEXT: #NO_APP
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; X32-NEXT: movaps %xmm0, (%esp)
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; X32-NEXT: movl %ebp, %esp
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: nop:
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; X64: # %bb.0:
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; X64-NEXT: #APP
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; X64-NEXT: #NO_APP
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; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; X64-NEXT: retq
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%1 = alloca <4 x float>, align 16
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%2 = call <4 x float> asm "", "=x,~{dirflag},~{fpsr},~{flags}"()
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store <4 x float> %2, ptr %1, align 16
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ret void
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}
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