llvm-project/clang/test/CodeGen/RISCV
Zakk Chen 0bc1959f51 [RISCV][NFC] Fix RVV intrinsic tests.
1. Skip the temporary file
2. Test cc1 with -S to verify codegen work well. Add '-target-feature
   +m' because the backend requires it to calculate the vscaled size/offset.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D99082
2021-03-23 06:06:05 -07:00
..
rvv-intrinsics [RISCV][NFC] Fix RVV intrinsic tests. 2021-03-23 06:06:05 -07:00
rvv-intrinsics-generic [RISCV][NFC] Fix RVV intrinsic tests. 2021-03-23 06:06:05 -07:00
riscv-atomics.c NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. 2021-02-11 17:35:09 -05:00
riscv-inline-asm.c
riscv-metadata.c
riscv-sdata-module-flag.c
riscv-v-debuginfo.c [Clang][RISCV] Define RISC-V V builtin types 2021-02-18 10:17:31 +08:00
riscv32-ilp32-abi.c
riscv32-ilp32-ilp32f-abi.c
riscv32-ilp32-ilp32f-ilp32d-abi.c
riscv32-ilp32d-abi.c
riscv32-ilp32f-abi.c
riscv32-ilp32f-ilp32d-abi.c
riscv64-lp64-abi.c
riscv64-lp64-lp64f-abi.c
riscv64-lp64-lp64f-lp64d-abi.c
riscv64-lp64d-abi.c
riscv64-lp64f-lp64d-abi.c