llvm-project/llvm/test/Transforms/AggressiveInstCombine/masked-cmp.ll

40 lines
1.1 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
; PR37098 - https://bugs.llvm.org/show_bug.cgi?id=37098
define i32 @two_bit_mask(i32 %x) {
; CHECK-LABEL: @two_bit_mask(
; CHECK-NEXT: [[S:%.*]] = lshr i32 [[X:%.*]], 3
; CHECK-NEXT: [[O:%.*]] = or i32 [[S]], [[X]]
; CHECK-NEXT: [[R:%.*]] = and i32 [[O]], 1
; CHECK-NEXT: ret i32 [[R]]
;
%s = lshr i32 %x, 3
%o = or i32 %s, %x
%r = and i32 %o, 1
ret i32 %r
}
define i32 @four_bit_mask(i32 %x) {
; CHECK-LABEL: @four_bit_mask(
; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[X:%.*]], 3
; CHECK-NEXT: [[T2:%.*]] = lshr i32 [[X]], 5
; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[X]], 8
; CHECK-NEXT: [[O1:%.*]] = or i32 [[T1]], [[X]]
; CHECK-NEXT: [[O2:%.*]] = or i32 [[T2]], [[T3]]
; CHECK-NEXT: [[O3:%.*]] = or i32 [[O1]], [[O2]]
; CHECK-NEXT: [[R:%.*]] = and i32 [[O3]], 1
; CHECK-NEXT: ret i32 [[R]]
;
%t1 = lshr i32 %x, 3
%t2 = lshr i32 %x, 5
%t3 = lshr i32 %x, 8
%o1 = or i32 %t1, %x
%o2 = or i32 %t2, %t3
%o3 = or i32 %o1, %o2
%r = and i32 %o3, 1
ret i32 %r
}