Matt Arsenault dc6c78596b GlobalISel: Implement fewerElementsVector for select ... llvm-svn: 352601		2019-01-30 04:19:31 +00:00
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AArch64	GlobalISel: Verify pointer casts	2019-01-29 23:29:00 +00:00
AMDGPU	GlobalISel: Implement fewerElementsVector for select	2019-01-30 04:19:31 +00:00
ARC	…
ARM	[ARM] Use sub for negative offset load/store in thumb1	2019-01-29 10:40:31 +00:00
AVR	…
BPF	…
Generic	…
Hexagon	[Pipeliner] Add two pragmas to control software pipelining optimization	2019-01-23 03:26:10 +00:00
Inputs	…
Lanai	…
MIR	GlobalISel: Verify load/store has a pointer input	2019-01-27 15:57:23 +00:00
MSP430	[MSP430] Fix absolute addressing mode printing in AsmPrinter	2019-01-25 09:14:05 +00:00
Mips	[mips] Support for +abs2008 attribute	2019-01-28 14:59:30 +00:00
NVPTX	[NVPTX] Some nvvm.read.ptx.sreg intrinsics should have IntrInaccessibleMemOnly attribute.	2019-01-26 00:28:32 +00:00
PowerPC	[PowerPC] more opportunity for converting reg+reg to reg+imm	2019-01-30 01:57:01 +00:00
RISCV	[RISCV] Add target DAG combine for bitcast fabs/fneg on RV32FD	2019-01-25 21:55:48 +00:00
SPARC	…
SystemZ	[CodeGenPrepare] Handle all debug calls in dupRetToEnableTailCallOpts()	2019-01-29 09:03:35 +00:00
Thumb	…
Thumb2	Revert r351938 "[ARM] Alter the register allocation order for minsize on Thumb2"	2019-01-23 21:10:48 +00:00
WebAssembly	[WebAssembly] Exception handling: Switch to the new proposal	2019-01-30 03:21:57 +00:00
WinCFGuard	…
WinEH	…
X86	GlobalISel: Verify memory size for load/store	2019-01-30 01:10:42 +00:00
XCore	…