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llvm-project/llvm/test/MC/Disassembler
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Dmitry Preobrazhensky 6bc26aaada [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands 
See bug 39332: https://bugs.llvm.org/show_bug.cgi?id=39332

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D56794

llvm-svn: 351555
 		2019-01-18 15:17:17 +00:00
..
AArch64 [AArch64] Move feature predctrl to predres 2019-01-09 11:24:15 +00:00
AMDGPU [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands 2019-01-18 15:17:17 +00:00
ARC [ARC] Prevent InstPrinter from crashing on unknown condition codes. 2018-09-06 19:58:26 +00:00
ARM [NFC] Fix missing testfile change of rL350299 2019-01-03 12:48:06 +00:00
Hexagon NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
Lanai
…
MSP430 [MSP430] Minor fixes/improvements for assembler/disassembler 2019-01-10 22:59:50 +00:00
Mips [mips] Add missing instructions 2018-08-29 11:35:03 +00:00
PowerPC Complete the SPE instruction set patterns 2018-07-18 04:24:57 +00:00
RISCV [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988 2018-12-03 10:35:46 +00:00
Sparc [Sparc] Add membar assembler tags 2018-12-13 15:29:12 +00:00
SystemZ [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
WebAssembly [WebAssembly] Massive instruction renaming 2019-01-08 06:25:55 +00:00
X86 [X86][Disassembler] Add bizarro versions of the MOVSXD instruction that sign extend from a GR32 to GR32 or GR16. 2018-10-02 18:16:19 +00:00
XCore
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