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AArch64
[AArch64][GlobalISel] Add post-legalize combine for sext(trunc(sextload)) -> trunc/copy
2020-07-23 12:06:35 -07:00
AMDGPU
AMDGPU: Fix failures from overflowing uint8_t number of operands
2020-07-23 15:39:33 -04:00
ARC
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ARM
[Thumb] set code alignment for 16-bit load from constant pool
2020-07-22 10:12:41 +01:00
AVR
[AVR] Rewrite the function calling convention.
2020-06-23 21:36:18 +12:00
BPF
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Generic
[llc] (almost) remove `--print-machineinstrs`
2020-07-20 10:43:28 -07:00
Hexagon
[llc] (almost) remove `--print-machineinstrs`
2020-07-20 10:43:28 -07:00
Inputs
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Lanai
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MIR
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
MSP430
[MSP430] Declare comparison LibCalls as returning i16 instead of i32
2020-06-30 11:04:22 +03:00
Mips
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
NVPTX
[NVPTX] Fix for NVPTX module asm regression
2020-06-24 11:17:09 -07:00
PowerPC
[PowerPC][Power10] Fix vins*vlx instructions to have i32 arguments.
2020-07-22 17:58:14 -05:00
RISCV
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SPARC
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SystemZ
[SystemZ] Ensure -mno-vx disables any use of vector features
2020-07-23 15:34:59 +02:00
Thumb
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Thumb2
[ARM] Add predicated mla reduction patterns
2020-07-23 21:47:59 +01:00
VE
[VE] Support symbol with offset value
2020-07-01 23:55:27 +09:00
WebAssembly
[WebAssembly] Autogenerate checks in simd-offset.ll
2020-07-22 10:12:26 -07:00
WinCFGuard
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WinEH
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X86
[IR] Add min/max/abs intrinsics
2020-07-23 20:56:19 +02:00
XCore
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