52 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			52 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s
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| ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
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| 
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| 
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| ; GCN-LABEL: {{^}}add_var_var_i1:
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| ; GFX9:  s_xor_b64
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| ; GFX10: s_xor_b32
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| define amdgpu_kernel void @add_var_var_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in0, i1 addrspace(1)* %in1) {
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|   %a = load volatile i1, i1 addrspace(1)* %in0
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|   %b = load volatile i1, i1 addrspace(1)* %in1
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|   %add = add i1 %a, %b
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|   store i1 %add, i1 addrspace(1)* %out
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|   ret void
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| }
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| 
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| ; GCN-LABEL: {{^}}add_var_imm_i1:
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| ; GFX9:  s_not_b64
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| ; GFX10: s_not_b32
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| define amdgpu_kernel void @add_var_imm_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) {
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|   %a = load volatile i1, i1 addrspace(1)* %in
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|   %add = add i1 %a, 1
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|   store i1 %add, i1 addrspace(1)* %out
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|   ret void
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| }
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| 
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| ; GCN-LABEL: {{^}}add_i1_cf:
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| ; GCN: ; %endif
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| ; GFX9: s_not_b64
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| ; GFX10: s_not_b32
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| define amdgpu_kernel void @add_i1_cf(i1 addrspace(1)* %out, i1 addrspace(1)* %a, i1 addrspace(1)* %b) {
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| entry:
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|   %tid = call i32 @llvm.amdgcn.workitem.id.x()
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|   %d_cmp = icmp ult i32 %tid, 16
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|   br i1 %d_cmp, label %if, label %else
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| 
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| if:
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|   %0 = load volatile i1, i1 addrspace(1)* %a
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|   br label %endif
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| 
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| else:
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|   %1 = load volatile i1, i1 addrspace(1)* %b
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|   br label %endif
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| 
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| endif:
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|   %2 = phi i1 [%0, %if], [%1, %else]
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|   %3 = add i1 %2, -1
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|   store i1 %3, i1 addrspace(1)* %out
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|   ret void
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| }
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| 
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| declare i32 @llvm.amdgcn.workitem.id.x()
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