99 lines
3.8 KiB
YAML
99 lines
3.8 KiB
YAML
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=simple-register-coalescing,rename-independent-subregs %s -o - | FileCheck -check-prefix=GCN %s
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# This test is for a bug where the following happens:
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#
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# Inside the loop, %29.sub2 is used in a V_LSHLREV whose result is then used
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# in an LDS read. %29 is a 128 bit value that is linked by copies to
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# %45 (from phi elimination), %28 (the value in the loop pre-header),
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# %31 (defined and subreg-modified in the loop, and used after the loop)
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# and %30:
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#
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# %45:vreg_128 = COPY killed %28
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# bb.1:
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# %29:vreg_128 = COPY killed %45
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# %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec
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# %31:vreg_128 = COPY killed %29
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# %31.sub1:vreg_128 = COPY %34
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# %30:vreg_128 = COPY %31
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# %45:vreg_128 = COPY killed %30
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# S_CBRANCH_EXECNZ %bb.39, implicit $exec
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# S_BRANCH %bb.40
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# bb.2:
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# undef %32.sub0:vreg_128 = COPY killed %31.sub0
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#
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# So this coalesces together into a single 128 bit value whose sub1 is modified
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# in the loop, but the sub2 used in the V_LSHLREV is not modified in the loop.
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#
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# The bug is that the coalesced value has a L00000004 subrange (for sub2) that
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# says that it is not live up to the end of the loop block. The symptom is that
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# Rename Independent Subregs separates sub2 into its own register, and it is
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# not live round the loop, so that pass adds an IMPLICIT_DEF for it just before
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# the loop backedge.
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# GCN: bb.1:
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# GCN: V_LSHLREV_B32_e32 2, [[val:%[0-9][0-9]*]].sub2
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# GCN-NOT: [[val]]:vreg_128 = IMPLICIT_DEF
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---
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name: _amdgpu_cs_main
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1
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%3:sgpr_32 = S_MOV_B32 0
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undef %19.sub1:vreg_128 = COPY undef %3
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%4:sgpr_32 = S_MOV_B32 1
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%5:sgpr_32 = S_MOV_B32 2
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%11:sreg_32_xm0 = S_MOV_B32 255
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undef %28.sub0:vreg_128 = COPY killed %3
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%28.sub1:vreg_128 = COPY killed %4
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%28.sub2:vreg_128 = COPY killed %11
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%28.sub3:vreg_128 = COPY killed %5
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%2:sreg_64 = S_MOV_B64 0
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%34:sreg_32 = S_MOV_B32 7
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%37:vreg_128 = COPY undef %42:vreg_128
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%43:sreg_64 = COPY killed %2
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%44:vreg_128 = COPY killed %37
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%45:vreg_128 = COPY killed %28
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bb.1:
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successors: %bb.1, %bb.2
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%29:vreg_128 = COPY killed %45
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%36:vreg_128 = COPY killed %44
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%0:sreg_64 = COPY killed %43
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%39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec
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%41:vgpr_32 = V_ADD_CO_U32_e32 1152, %39, implicit-def dead $vcc, implicit $exec
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$m0 = S_MOV_B32 -1
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%12:vreg_64 = DS_READ2_B32 killed %41, 0, 1, 0, implicit $m0, implicit $exec
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%13:vreg_64 = DS_READ2_B32 %39, -112, -111, 0, implicit $m0, implicit $exec
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%14:vreg_64 = DS_READ2_B32 %39, 0, 1, 0, implicit $m0, implicit $exec
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%40:vgpr_32 = V_ADD_CO_U32_e32 1160, %39, implicit-def dead $vcc, implicit $exec
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%15:vreg_64 = DS_READ2_B32 killed %40, 0, 1, 0, implicit $m0, implicit $exec
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%16:vreg_64 = DS_READ2_B32 %39, -110, -109, 0, implicit $m0, implicit $exec
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%17:vreg_64 = DS_READ2_B32 %39, 2, 3, 0, implicit $m0, implicit $exec
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undef %35.sub1:vreg_128 = COPY undef %34
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%31:vreg_128 = COPY killed %29
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%31.sub1:vreg_128 = COPY %34
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%38:vgpr_32 = V_ADD_CO_U32_e32 1, %36.sub0, implicit-def dead $vcc, implicit $exec
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%18:sreg_64 = V_CMP_LT_I32_e64 5, %38, implicit $exec
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%1:sreg_64 = S_OR_B64 killed %18, killed %0, implicit-def $scc
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%30:vreg_128 = COPY %31
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%43:sreg_64 = COPY %1
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%44:vreg_128 = COPY %35
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%45:vreg_128 = COPY killed %30
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$exec = S_ANDN2_B64_term $exec, %1, implicit-def $scc
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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$exec = S_OR_B64 $exec, killed %1, implicit-def $scc
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%33:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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undef %32.sub0:vreg_128 = COPY killed %31.sub0
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%32.sub2:vreg_128 = COPY %33
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %32:vreg_128
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S_ENDPGM 0
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...
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