202 lines
6.6 KiB
LLVM
202 lines
6.6 KiB
LLVM
; RUN: llc < %s -march=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck %s --check-prefix=GCN
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}full_mask:
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; GCN: s_mov_b64 exec, -1
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; GCN: v_add_f32_e32 v0,
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define amdgpu_ps float @full_mask(float %a, float %b) {
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main_body:
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%s = fadd float %a, %b
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call void @llvm.amdgcn.init.exec(i64 -1)
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ret float %s
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}
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; GCN-LABEL: {{^}}partial_mask:
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; GCN: s_mov_b64 exec, 0x1e240
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; GCN: v_add_f32_e32 v0,
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define amdgpu_ps float @partial_mask(float %a, float %b) {
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main_body:
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%s = fadd float %a, %b
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call void @llvm.amdgcn.init.exec(i64 123456)
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ret float %s
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}
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; GCN-LABEL: {{^}}input_s3off8:
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; GCN: s_bfe_u32 s0, s3, 0x70008
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; GCN: s_bfm_b64 exec, s0, 0
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; GCN: s_cmp_eq_u32 s0, 64
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; GCN: s_cmov_b64 exec, -1
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; GCN: v_add_f32_e32 v0,
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define amdgpu_ps float @input_s3off8(i32 inreg, i32 inreg, i32 inreg, i32 inreg %count, float %a, float %b) {
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main_body:
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%s = fadd float %a, %b
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
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ret float %s
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}
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; GCN-LABEL: {{^}}input_s0off19:
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; GCN: s_bfe_u32 s0, s0, 0x70013
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; GCN: s_bfm_b64 exec, s0, 0
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; GCN: s_cmp_eq_u32 s0, 64
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; GCN: s_cmov_b64 exec, -1
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; GCN: v_add_f32_e32 v0,
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define amdgpu_ps float @input_s0off19(i32 inreg %count, float %a, float %b) {
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main_body:
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%s = fadd float %a, %b
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 19)
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ret float %s
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}
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; GCN-LABEL: {{^}}reuse_input:
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; GCN: s_bfe_u32 s1, s0, 0x70013
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; GCN: s_bfm_b64 exec, s1, 0
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; GCN: s_cmp_eq_u32 s1, 64
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; GCN: s_cmov_b64 exec, -1
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; GCN: v_add{{(_nc)?}}_u32_e32 v0, s0, v0
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define amdgpu_ps float @reuse_input(i32 inreg %count, i32 %a) {
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main_body:
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 19)
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%s = add i32 %a, %count
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%f = sitofp i32 %s to float
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ret float %f
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}
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; GCN-LABEL: {{^}}reuse_input2:
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; GCN: s_bfe_u32 s1, s0, 0x70013
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; GCN: s_bfm_b64 exec, s1, 0
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; GCN: s_cmp_eq_u32 s1, 64
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; GCN: s_cmov_b64 exec, -1
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; GCN: v_add{{(_nc)?}}_u32_e32 v0, s0, v0
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define amdgpu_ps float @reuse_input2(i32 inreg %count, i32 %a) {
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main_body:
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%s = add i32 %a, %count
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%f = sitofp i32 %s to float
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 19)
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ret float %f
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}
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; GCN-LABEL: {{^}}init_unreachable:
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;
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; This used to crash.
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define amdgpu_ps void @init_unreachable() {
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main_body:
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call void @llvm.amdgcn.init.exec(i64 -1)
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unreachable
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}
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; GCN-LABEL: {{^}}init_exec_before_frame_materialize:
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; GCN-NOT: {{^}}v_
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; GCN: s_mov_b64 exec, -1
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; GCN: v_mov
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; GCN: v_add
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define amdgpu_ps float @init_exec_before_frame_materialize(i32 inreg %a, i32 inreg %b) {
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main_body:
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%array0 = alloca [1024 x i32], align 16, addrspace(5)
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%array1 = alloca [20 x i32], align 16, addrspace(5)
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call void @llvm.amdgcn.init.exec(i64 -1)
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%ptr0 = getelementptr inbounds [1024 x i32], [1024 x i32] addrspace(5)* %array0, i32 0, i32 1
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store i32 %a, i32 addrspace(5)* %ptr0, align 4
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%ptr1 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 1
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store i32 %a, i32 addrspace(5)* %ptr1, align 4
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%ptr2 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 2
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store i32 %b, i32 addrspace(5)* %ptr2, align 4
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%ptr3 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 %b
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%v3 = load i32, i32 addrspace(5)* %ptr3, align 4
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%ptr4 = getelementptr inbounds [1024 x i32], [1024 x i32] addrspace(5)* %array0, i32 0, i32 %b
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%v4 = load i32, i32 addrspace(5)* %ptr4, align 4
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%v5 = add i32 %v3, %v4
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%v = bitcast i32 %v5 to float
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ret float %v
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}
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; GCN-LABEL: {{^}}init_exec_input_before_frame_materialize:
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; GCN-NOT: {{^}}v_
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; GCN: s_bfe_u32 s2, s2, 0x70008
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; GCN-NEXT: s_bfm_b64 exec, s2, 0
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; GCN-NEXT: s_cmp_eq_u32 s2, 64
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; GCN-NEXT: s_cmov_b64 exec, -1
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; GCN: v_mov
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; GCN: v_add
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define amdgpu_ps float @init_exec_input_before_frame_materialize(i32 inreg %a, i32 inreg %b, i32 inreg %count) {
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main_body:
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%array0 = alloca [1024 x i32], align 16, addrspace(5)
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%array1 = alloca [20 x i32], align 16, addrspace(5)
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
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%ptr0 = getelementptr inbounds [1024 x i32], [1024 x i32] addrspace(5)* %array0, i32 0, i32 1
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store i32 %a, i32 addrspace(5)* %ptr0, align 4
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%ptr1 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 1
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store i32 %a, i32 addrspace(5)* %ptr1, align 4
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%ptr2 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 2
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store i32 %b, i32 addrspace(5)* %ptr2, align 4
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%ptr3 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 %b
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%v3 = load i32, i32 addrspace(5)* %ptr3, align 4
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%ptr4 = getelementptr inbounds [1024 x i32], [1024 x i32] addrspace(5)* %array0, i32 0, i32 %b
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%v4 = load i32, i32 addrspace(5)* %ptr4, align 4
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%v5 = add i32 %v3, %v4
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%v = bitcast i32 %v5 to float
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ret float %v
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}
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; GCN-LABEL: {{^}}init_exec_input_before_frame_materialize_nonentry:
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; GCN-NOT: {{^}}v_
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; GCN: %endif
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; GCN: s_bfe_u32 s3, s2, 0x70008
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; GCN-NEXT: s_bfm_b64 exec, s3, 0
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; GCN-NEXT: s_cmp_eq_u32 s3, 64
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; GCN-NEXT: s_cmov_b64 exec, -1
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; GCN: v_mov
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; GCN: v_add
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define amdgpu_ps float @init_exec_input_before_frame_materialize_nonentry(i32 inreg %a, i32 inreg %b, i32 inreg %count) {
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main_body:
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; ideally these alloca would be in %endif, but this causes problems on Windows GlobalISel
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%array0 = alloca [1024 x i32], align 16, addrspace(5)
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%array1 = alloca [20 x i32], align 16, addrspace(5)
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%cc = icmp uge i32 %count, 32
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br i1 %cc, label %endif, label %if
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if:
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call void asm sideeffect "", ""()
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br label %endif
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endif:
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
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%ptr0 = getelementptr inbounds [1024 x i32], [1024 x i32] addrspace(5)* %array0, i32 0, i32 1
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store i32 %a, i32 addrspace(5)* %ptr0, align 4
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%ptr1 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 1
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store i32 %a, i32 addrspace(5)* %ptr1, align 4
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%ptr2 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 2
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store i32 %b, i32 addrspace(5)* %ptr2, align 4
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%ptr3 = getelementptr inbounds [20 x i32], [20 x i32] addrspace(5)* %array1, i32 0, i32 %b
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%v3 = load i32, i32 addrspace(5)* %ptr3, align 4
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%ptr4 = getelementptr inbounds [1024 x i32], [1024 x i32] addrspace(5)* %array0, i32 0, i32 %b
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%v4 = load i32, i32 addrspace(5)* %ptr4, align 4
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%v5 = add i32 %v3, %v4
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%v6 = add i32 %v5, %count
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%v = bitcast i32 %v6 to float
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ret float %v
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}
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declare void @llvm.amdgcn.init.exec(i64) #1
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declare void @llvm.amdgcn.init.exec.from.input(i32, i32) #1
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attributes #1 = { convergent }
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