88 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			88 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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| 
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| @local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
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| 
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| ; Check that the LDS size emitted correctly
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| ; EG: .long 166120
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| ; EG-NEXT: .long 128
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| 
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| ; FUNC-LABEL: {{^}}local_memory:
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| 
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| ; EG: LDS_WRITE
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| 
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| ; GROUP_BARRIER must be the last instruction in a clause
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| ; EG: GROUP_BARRIER
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| ; EG-NEXT: ALU clause
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| 
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| ; EG: LDS_READ_RET
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| define amdgpu_kernel void @local_memory(i32 addrspace(1)* %out) #0 {
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| entry:
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|   %y.i = call i32 @llvm.r600.read.tidig.x() #1
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|   %arrayidx = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %y.i
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|   store i32 %y.i, i32 addrspace(3)* %arrayidx, align 4
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|   %add = add nsw i32 %y.i, 1
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|   %cmp = icmp eq i32 %add, 16
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|   %.add = select i1 %cmp, i32 0, i32 %add
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|   call void @llvm.r600.group.barrier()
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|   %arrayidx1 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %.add
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|   %tmp = load i32, i32 addrspace(3)* %arrayidx1, align 4
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|   %arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %y.i
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|   store i32 %tmp, i32 addrspace(1)* %arrayidx2, align 4
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|   ret void
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| }
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| 
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| @local_memory_two_objects.local_mem0 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4
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| @local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4
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| 
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| ; Check that the LDS size emitted correctly
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| ; EG: .long 166120
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| ; EG-NEXT: .long 8
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| ; GCN: .long 47180
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| ; GCN-NEXT: .long 32900
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| 
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| ; FUNC-LABEL: {{^}}local_memory_two_objects:
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| 
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| ; We would like to check the lds writes are using different
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| ; addresses, but due to variations in the scheduler, we can't do
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| ; this consistently on evergreen GPUs.
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| ; EG: LDS_WRITE
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| ; EG: LDS_WRITE
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| 
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| ; GROUP_BARRIER must be the last instruction in a clause
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| ; EG: GROUP_BARRIER
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| ; EG-NEXT: ALU clause
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| 
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| ; Make sure the lds reads are using different addresses, at different
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| ; constant offsets.
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| ; EG: LDS_READ_RET {{[*]*}} OQAP, {{PV|T}}[[ADDRR:[0-9]*\.[XYZW]]]
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| ; EG-NOT: LDS_READ_RET {{[*]*}} OQAP, T[[ADDRR]]
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| 
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| define amdgpu_kernel void @local_memory_two_objects(i32 addrspace(1)* %out) #0 {
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| entry:
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|   %x.i = call i32 @llvm.r600.read.tidig.x() #1
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|   %arrayidx = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %x.i
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|   store i32 %x.i, i32 addrspace(3)* %arrayidx, align 4
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|   %mul = shl nsw i32 %x.i, 1
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|   %arrayidx1 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %x.i
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|   store i32 %mul, i32 addrspace(3)* %arrayidx1, align 4
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|   %sub = sub nsw i32 3, %x.i
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|   call void @llvm.r600.group.barrier()
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|   %arrayidx2 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %sub
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|   %tmp = load i32, i32 addrspace(3)* %arrayidx2, align 4
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|   %arrayidx3 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %x.i
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|   store i32 %tmp, i32 addrspace(1)* %arrayidx3, align 4
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|   %arrayidx4 = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %sub
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|   %tmp1 = load i32, i32 addrspace(3)* %arrayidx4, align 4
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|   %add = add nsw i32 %x.i, 4
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|   %arrayidx5 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %add
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|   store i32 %tmp1, i32 addrspace(1)* %arrayidx5, align 4
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|   ret void
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| }
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| 
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| declare i32 @llvm.r600.read.tidig.x() #1
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| declare void @llvm.r600.group.barrier() #2
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| 
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| attributes #0 = { nounwind }
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| attributes #1 = { nounwind readnone }
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| attributes #2 = { convergent nounwind }
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