202 lines
		
	
	
		
			7.1 KiB
		
	
	
	
		
			YAML
		
	
	
	
			
		
		
	
	
			202 lines
		
	
	
		
			7.1 KiB
		
	
	
	
		
			YAML
		
	
	
	
| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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| # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra,si-optimize-exec-masking-pre-ra -o - %s | FileCheck %s
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| 
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| # FIXME: Second run of the pass is a workaround for a bug in
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| # -run-pass. The verifier doesn't detect broken LiveIntervals, see bug
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| # 46873
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| 
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| 
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| # Cannot fold this without moving the def of %7 after the and.
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| ---
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| name:            no_fold_andn2_select_condition_live_out_phi
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| tracksRegLiveness: true
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| body:             |
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|   ; CHECK-LABEL: name: no_fold_andn2_select_condition_live_out_phi
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|   ; CHECK: bb.0:
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|   ; CHECK:   successors: %bb.2(0x80000000)
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|   ; CHECK:   [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 -1
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|   ; CHECK:   undef %1.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|   ; CHECK:   S_BRANCH %bb.2
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|   ; CHECK: bb.1:
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|   ; CHECK:   S_ENDPGM 0
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|   ; CHECK: bb.2:
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|   ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
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|   ; CHECK:   [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[S_MOV_B64_]], implicit $exec
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|   ; CHECK:   V_CMP_NE_U32_e32 1, [[V_CNDMASK_B32_e64_]], implicit-def $vcc, implicit $exec
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|   ; CHECK:   %1.sub1:vreg_64 = COPY %1.sub0
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|   ; CHECK:   DS_WRITE_B64_gfx9 undef %3:vgpr_32, %1, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|   ; CHECK:   ATOMIC_FENCE 4, 2
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|   ; CHECK:   [[S_MOV_B64_1:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 0
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|   ; CHECK:   $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
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|   ; CHECK:   S_CBRANCH_VCCNZ %bb.1, implicit $vcc
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|   ; CHECK:   S_BRANCH %bb.2
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|   bb.0:
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|     successors: %bb.2
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| 
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|     %7:sreg_64_xexec = S_MOV_B64 -1
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|     undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|     S_BRANCH %bb.2
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| 
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|   bb.1:
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|     S_ENDPGM 0
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| 
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|   bb.2:
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|     successors: %bb.1, %bb.2
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| 
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|     %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %7, implicit $exec
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|     V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec
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|     %5.sub1:vreg_64 = COPY %5.sub0
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|     DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|     ATOMIC_FENCE 4, 2
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|     %7:sreg_64_xexec = S_MOV_B64 0
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|     $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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|     S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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|     S_BRANCH %bb.2  
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| 
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| ...
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| 
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| # It's OK to fold this, since the phi def is after the andn2 insert point.
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| ---
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| name:            fold_andn2_select_condition_live_out_phi_reorder
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| tracksRegLiveness: true
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| body:             |
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|   ; CHECK-LABEL: name: fold_andn2_select_condition_live_out_phi_reorder
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|   ; CHECK: bb.0:
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|   ; CHECK:   successors: %bb.2(0x80000000)
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|   ; CHECK:   [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 -1
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|   ; CHECK:   undef %1.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|   ; CHECK:   S_BRANCH %bb.2
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|   ; CHECK: bb.1:
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|   ; CHECK:   S_ENDPGM 0
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|   ; CHECK: bb.2:
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|   ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
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|   ; CHECK:   %1.sub1:vreg_64 = COPY %1.sub0
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|   ; CHECK:   DS_WRITE_B64_gfx9 undef %3:vgpr_32, %1, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|   ; CHECK:   ATOMIC_FENCE 4, 2
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|   ; CHECK:   $vcc = S_ANDN2_B64 $exec, [[S_MOV_B64_]], implicit-def dead $scc
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|   ; CHECK:   [[S_MOV_B64_1:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 0
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|   ; CHECK:   S_CBRANCH_VCCNZ %bb.1, implicit $vcc
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|   ; CHECK:   S_BRANCH %bb.2
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|   bb.0:
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|     successors: %bb.2
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| 
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|     %7:sreg_64_xexec = S_MOV_B64 -1
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|     undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|     S_BRANCH %bb.2
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| 
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|   bb.1:
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|     S_ENDPGM 0
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| 
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|   bb.2:
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|     successors: %bb.1, %bb.2
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| 
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|     %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %7, implicit $exec
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|     V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec
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|     %5.sub1:vreg_64 = COPY %5.sub0
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|     DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|     ATOMIC_FENCE 4, 2
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|     $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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|     %7:sreg_64_xexec = S_MOV_B64 0
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|     S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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|     S_BRANCH %bb.2  
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| 
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| ...
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| 
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| ---
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| name:            no_fold_andn2_select_condition_live_out_phi_physreg
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| tracksRegLiveness: true
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| body:             |
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|   ; CHECK-LABEL: name: no_fold_andn2_select_condition_live_out_phi_physreg
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|   ; CHECK: bb.0:
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|   ; CHECK:   successors: %bb.2(0x80000000)
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|   ; CHECK:   $sgpr4_sgpr5 = S_MOV_B64 -1
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|   ; CHECK:   undef %0.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|   ; CHECK:   S_BRANCH %bb.2
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|   ; CHECK: bb.1:
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|   ; CHECK:   S_ENDPGM 0
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|   ; CHECK: bb.2:
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|   ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
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|   ; CHECK:   liveins: $sgpr4_sgpr5
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|   ; CHECK:   [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr4_sgpr5, implicit $exec
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|   ; CHECK:   V_CMP_NE_U32_e32 1, [[V_CNDMASK_B32_e64_]], implicit-def $vcc, implicit $exec
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|   ; CHECK:   %0.sub1:vreg_64 = COPY %0.sub0
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|   ; CHECK:   DS_WRITE_B64_gfx9 undef %2:vgpr_32, %0, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|   ; CHECK:   ATOMIC_FENCE 4, 2
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|   ; CHECK:   $sgpr4_sgpr5 = S_MOV_B64 0
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|   ; CHECK:   $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc
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|   ; CHECK:   S_CBRANCH_VCCNZ %bb.1, implicit $vcc
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|   ; CHECK:   S_BRANCH %bb.2
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|   bb.0:
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|     successors: %bb.2
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| 
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|     $sgpr4_sgpr5 = S_MOV_B64 -1
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|     undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|     S_BRANCH %bb.2
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| 
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|   bb.1:
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|     S_ENDPGM 0
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| 
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|   bb.2:
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|     successors: %bb.1, %bb.2
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|     liveins: $sgpr4_sgpr5
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| 
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|     %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr4_sgpr5, implicit $exec
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|     V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec
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|     %5.sub1:vreg_64 = COPY %5.sub0
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|     DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|     ATOMIC_FENCE 4, 2
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|     $sgpr4_sgpr5 = S_MOV_B64 0
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|     $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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|     S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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|     S_BRANCH %bb.2  
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| 
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| ...
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| 
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| ---
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| name:            fold_andn2_select_condition_live_out_phi_physreg_reorder
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| tracksRegLiveness: true
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| body:             |
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|   ; CHECK-LABEL: name: fold_andn2_select_condition_live_out_phi_physreg_reorder
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|   ; CHECK: bb.0:
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|   ; CHECK:   successors: %bb.2(0x80000000)
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|   ; CHECK:   $sgpr4_sgpr5 = S_MOV_B64 -1
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|   ; CHECK:   undef %0.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|   ; CHECK:   S_BRANCH %bb.2
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|   ; CHECK: bb.1:
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|   ; CHECK:   S_ENDPGM 0
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|   ; CHECK: bb.2:
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|   ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
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|   ; CHECK:   liveins: $sgpr4_sgpr5
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|   ; CHECK:   %0.sub1:vreg_64 = COPY %0.sub0
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|   ; CHECK:   DS_WRITE_B64_gfx9 undef %2:vgpr_32, %0, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|   ; CHECK:   ATOMIC_FENCE 4, 2
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|   ; CHECK:   $vcc = S_ANDN2_B64 $exec, $sgpr4_sgpr5, implicit-def dead $scc
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|   ; CHECK:   $sgpr4_sgpr5 = S_MOV_B64 0
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|   ; CHECK:   S_CBRANCH_VCCNZ %bb.1, implicit $vcc
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|   ; CHECK:   S_BRANCH %bb.2
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|   bb.0:
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|     successors: %bb.2
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| 
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|     $sgpr4_sgpr5 = S_MOV_B64 -1
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|     undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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|     S_BRANCH %bb.2
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| 
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|   bb.1:
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|     S_ENDPGM 0
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| 
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|   bb.2:
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|     successors: %bb.1, %bb.2
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|     liveins: $sgpr4_sgpr5
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| 
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|     %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr4_sgpr5, implicit $exec
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|     V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec
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|     %5.sub1:vreg_64 = COPY %5.sub0
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|     DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store 8, addrspace 3)
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|     ATOMIC_FENCE 4, 2
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|     $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
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|     $sgpr4_sgpr5 = S_MOV_B64 0
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|     S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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|     S_BRANCH %bb.2  
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| 
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| ...
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