70 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			70 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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| 
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| ; GCN-LABEL: {{^}}const_load_no_shrink_dword_to_unaligned_byte:
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| ; GCN: s_load_dword s{{[0-9]+}}
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| ; GCN: s_load_dword [[LD:s[0-9]+]],
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| ; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10013
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| define amdgpu_kernel void @const_load_no_shrink_dword_to_unaligned_byte(i32 addrspace(1)* %out, i32 addrspace(4)* %in, i32 %x) {
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|   %ptr = getelementptr i32, i32 addrspace(4)* %in, i32 %x
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|   %load = load i32, i32 addrspace(4)* %ptr, align 4
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|   %and = and i32 %load, 524288
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|   %cmp = icmp eq i32 %and, 0
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|   %sel = select i1 %cmp, i32 0, i32 -1
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|   store i32 %sel, i32 addrspace(1)* %out
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|   ret void
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| }
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| 
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| ; GCN-LABEL: const_load_no_shrink_dword_to_aligned_byte:
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| ; GCN: s_load_dword s{{[0-9]+}}
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| ; GCN: s_load_dword [[LD:s[0-9]+]],
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| ; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10003
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| define amdgpu_kernel void @const_load_no_shrink_dword_to_aligned_byte(i32 addrspace(1)* %out, i32 addrspace(4)* %in, i32 %x) {
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|   %ptr = getelementptr i32, i32 addrspace(4)* %in, i32 %x
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|   %load = load i32, i32 addrspace(4)* %ptr, align 4
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|   %and = and i32 %load, 8
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|   %cmp = icmp eq i32 %and, 0
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|   %sel = select i1 %cmp, i32 0, i32 -1
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|   store i32 %sel, i32 addrspace(1)* %out
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|   ret void
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| }
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| 
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| ; GCN-LABEL: global_load_no_shrink_dword_to_unaligned_byte:
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| ; GCN: s_load_dword s{{[0-9]+}}
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| ; GCN: s_load_dword [[LD:s[0-9]+]],
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| ; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10013
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| define amdgpu_kernel void @global_load_no_shrink_dword_to_unaligned_byte(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %x) {
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|   %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %x
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|   %load = load i32, i32 addrspace(1)* %ptr, align 4
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|   %and = and i32 %load, 524288
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|   %cmp = icmp eq i32 %and, 0
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|   %sel = select i1 %cmp, i32 0, i32 -1
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|   store i32 %sel, i32 addrspace(1)* %out
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|   ret void
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| }
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| 
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| ; GCN-LABEL: global_load_no_shrink_dword_to_aligned_byte:
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| ; GCN: s_load_dword s{{[0-9]+}}
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| ; GCN: s_load_dword [[LD:s[0-9]+]],
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| ; GCN: s_bfe_i32 s{{[0-9]+}}, [[LD]], 0x10003
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| define amdgpu_kernel void @global_load_no_shrink_dword_to_aligned_byte(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %x) {
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|   %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %x
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|   %load = load i32, i32 addrspace(1)* %ptr, align 4
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|   %and = and i32 %load, 8
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|   %cmp = icmp eq i32 %and, 0
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|   %sel = select i1 %cmp, i32 0, i32 -1
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|   store i32 %sel, i32 addrspace(1)* %out
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|   ret void
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| }
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| 
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| ; GCN-LABEL: const_load_shrink_dword_to_unaligned_byte:
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| ; GCN: global_load_ushort
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| define amdgpu_kernel void @const_load_shrink_dword_to_unaligned_byte(i32 addrspace(1)* %out, i32 addrspace(4)* %in, i32 %x) {
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|   %ptr = getelementptr i32, i32 addrspace(4)* %in, i32 %x
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|   %load = load i32, i32 addrspace(4)* %ptr, align 2
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|   %and = and i32 %load, 524288
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|   %cmp = icmp eq i32 %and, 0
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|   %sel = select i1 %cmp, i32 0, i32 -1
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|   store i32 %sel, i32 addrspace(1)* %out
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|   ret void
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| }
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