115 lines
4.4 KiB
LLVM
115 lines
4.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn--amdhsa --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s
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; RUN: llc -mtriple=amdgcn--amdhsa --amdhsa-code-object-version=2 -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s
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; RUN: llc -mtriple=amdgcn--amdhsa --amdhsa-code-object-version=2 -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-HSA-TRAP %s
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; RUN: llc -mtriple=amdgcn--amdhsa --amdhsa-code-object-version=2 -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s
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; enable trap handler feature
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; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=TRAP-BIT -check-prefix=MESA-TRAP %s
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; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=TRAP-BIT %s
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; disable trap handler feature
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; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=NO-TRAP-BIT -check-prefix=NOMESA-TRAP %s
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; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=NO-TRAP-BIT %s
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s
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declare void @llvm.trap() #0
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declare void @llvm.debugtrap() #1
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; MESA-TRAP: .section .AMDGPU.config
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; MESA-TRAP: .long 47180
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; MESA-TRAP-NEXT: .long 208
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; NOMESA-TRAP: .section .AMDGPU.config
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; NOMESA-TRAP: .long 47180
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; NOMESA-TRAP-NEXT: .long 144
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; GCN-LABEL: {{^}}hsa_trap:
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; HSA-TRAP: enable_trap_handler = 0
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; HSA-TRAP: s_mov_b64 s[0:1], s[4:5]
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; HSA-TRAP: s_trap 2
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; for llvm.trap in hsa path without ABI, direct generate s_endpgm instruction without any warning information
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; NO-HSA-TRAP: enable_trap_handler = 0
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; NO-HSA-TRAP: s_endpgm
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; NO-HSA-TRAP: COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
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; TRAP-BIT: enable_trap_handler = 1
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; NO-TRAP-BIT: enable_trap_handler = 0
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; NO-MESA-TRAP: s_endpgm
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define amdgpu_kernel void @hsa_trap(i32 addrspace(1)* nocapture readonly %arg0) {
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store volatile i32 1, i32 addrspace(1)* %arg0
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call void @llvm.trap()
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unreachable
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store volatile i32 2, i32 addrspace(1)* %arg0
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ret void
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}
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; MESA-TRAP: .section .AMDGPU.config
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; MESA-TRAP: .long 47180
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; MESA-TRAP-NEXT: .long 208
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; NOMESA-TRAP: .section .AMDGPU.config
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; NOMESA-TRAP: .long 47180
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; NOMESA-TRAP-NEXT: .long 144
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; GCN-WARNING: warning: <unknown>:0:0: in function hsa_debugtrap void (i32 addrspace(1)*): debugtrap handler not supported
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; GCN-LABEL: {{^}}hsa_debugtrap:
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; HSA-TRAP: enable_trap_handler = 0
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; HSA-TRAP: s_trap 3
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; HSA-TRAP: flat_store_dword v[0:1], v3
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; for llvm.debugtrap in non-hsa path without ABI, generate a warning and a s_endpgm instruction
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; NO-HSA-TRAP: enable_trap_handler = 0
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; NO-HSA-TRAP: s_endpgm
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; TRAP-BIT: enable_trap_handler = 1
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; NO-TRAP-BIT: enable_trap_handler = 0
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; NO-MESA-TRAP: s_endpgm
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define amdgpu_kernel void @hsa_debugtrap(i32 addrspace(1)* nocapture readonly %arg0) {
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store volatile i32 1, i32 addrspace(1)* %arg0
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call void @llvm.debugtrap()
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store volatile i32 2, i32 addrspace(1)* %arg0
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ret void
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}
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; For non-HSA path
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; GCN-LABEL: {{^}}trap:
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; TRAP-BIT: enable_trap_handler = 1
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; NO-TRAP-BIT: enable_trap_handler = 0
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; NO-HSA-TRAP: s_endpgm
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; NO-MESA-TRAP: s_endpgm
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define amdgpu_kernel void @trap(i32 addrspace(1)* nocapture readonly %arg0) {
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store volatile i32 1, i32 addrspace(1)* %arg0
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call void @llvm.trap()
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unreachable
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store volatile i32 2, i32 addrspace(1)* %arg0
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ret void
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}
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; GCN-LABEL: {{^}}non_entry_trap:
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; TRAP-BIT: enable_trap_handler = 1
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; NO-TRAP-BIT: enable_trap_handler = 0
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; HSA-TRAP: BB{{[0-9]_[0-9]+}}: ; %trap
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; HSA-TRAP: s_mov_b64 s[0:1], s[4:5]
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; HSA-TRAP-NEXT: s_trap 2
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define amdgpu_kernel void @non_entry_trap(i32 addrspace(1)* nocapture readonly %arg0) local_unnamed_addr {
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entry:
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%tmp29 = load volatile i32, i32 addrspace(1)* %arg0
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%cmp = icmp eq i32 %tmp29, -1
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br i1 %cmp, label %ret, label %trap
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trap:
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call void @llvm.trap()
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unreachable
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ret:
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store volatile i32 3, i32 addrspace(1)* %arg0
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ret void
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}
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attributes #0 = { nounwind noreturn }
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attributes #1 = { nounwind }
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