202 lines
		
	
	
		
			7.5 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			202 lines
		
	
	
		
			7.5 KiB
		
	
	
	
		
			LLVM
		
	
	
	
; REQUIRES: aarch64-registered-target
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; RUN: opt -codegenprepare  < %s  -mtriple=aarch64-none-linux-gnu -S  | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-gnu"
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; Expect to skip merging two empty blocks (sw.bb and sw.bb2) into sw.epilog
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; as both of them are unlikely executed.
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define i32 @f_switch(i32 %c)  {
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; CHECK-LABEL: @f_switch
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; CHECK-LABEL: entry:
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; CHECK: i32 10, label %sw.bb
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; CHECK: i32 20, label %sw.bb2
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entry:
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  switch i32 %c, label %sw.default [
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    i32 10, label %sw.bb
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    i32 20, label %sw.bb2
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    i32 30, label %sw.bb3
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    i32 40, label %sw.bb4
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  ], !prof !0
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sw.bb:                                            ; preds = %entry
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  br label %sw.epilog
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sw.bb2:                                           ; preds = %entry
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  br label %sw.epilog
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sw.bb3:                                           ; preds = %entry
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  call void bitcast (void (...)* @callcase3 to void ()*)()
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  br label %sw.epilog
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sw.bb4:                                           ; preds = %entry
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  call void bitcast (void (...)* @callcase4 to void ()*)()
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  br label %sw.epilog
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sw.default:                                       ; preds = %entry
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  call void bitcast (void (...)* @calldefault to void ()*)()
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  br label %sw.epilog
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; CHECK-LABEL: sw.epilog:
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; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %sw.bb ]
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sw.epilog:                                        ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb
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  %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %sw.bb ]
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  %callee.knr.cast = bitcast void (...)* %fp.0 to void ()*
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  call void %callee.knr.cast()
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  ret i32 0
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}
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; Expect not to merge sw.bb2 because of the conflict in the incoming value from
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; sw.bb which is already merged.
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define i32 @f_switch2(i32 %c)  {
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; CHECK-LABEL: @f_switch2
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; CHECK-LABEL: entry:
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; CHECK: i32 10, label %sw.epilog
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; CHECK: i32 20, label %sw.bb2
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entry:
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  switch i32 %c, label %sw.default [
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    i32 10, label %sw.bb
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    i32 20, label %sw.bb2
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    i32 30, label %sw.bb3
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    i32 40, label %sw.bb4
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  ], !prof !1
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sw.bb:                                            ; preds = %entry
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  br label %sw.epilog
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sw.bb2:                                           ; preds = %entry
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  br label %sw.epilog
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sw.bb3:                                           ; preds = %entry
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  call void bitcast (void (...)* @callcase3 to void ()*)()
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  br label %sw.epilog
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sw.bb4:                                           ; preds = %entry
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  call void bitcast (void (...)* @callcase4 to void ()*)()
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  br label %sw.epilog
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sw.default:                                       ; preds = %entry
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  call void bitcast (void (...)* @calldefault to void ()*)()
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  br label %sw.epilog
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; CHECK-LABEL: sw.epilog:
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; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %entry ]
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sw.epilog:                                        ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb
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  %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %sw.bb ]
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  %callee.knr.cast = bitcast void (...)* %fp.0 to void ()*
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  call void %callee.knr.cast()
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  ret i32 0
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}
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; Multiple empty blocks should be considered together if all incoming values
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; from them are same.  We expect to merge both empty blocks (sw.bb and sw.bb2)
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; because the sum of frequencies are higer than the threshold.
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define i32 @f_switch3(i32 %c)  {
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; CHECK-LABEL: @f_switch3
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; CHECK-LABEL: entry:
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; CHECK: i32 10, label %sw.epilog
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; CHECK: i32 20, label %sw.epilog
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entry:
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  switch i32 %c, label %sw.default [
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    i32 10, label %sw.bb
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    i32 20, label %sw.bb2
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    i32 30, label %sw.bb3
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    i32 40, label %sw.bb4
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  ], !prof !2
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sw.bb:                                            ; preds = %entry
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  br label %sw.epilog
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sw.bb2:                                           ; preds = %entry
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  br label %sw.epilog
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sw.bb3:                                           ; preds = %entry
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  call void bitcast (void (...)* @callcase3 to void ()*)()
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  br label %sw.epilog
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sw.bb4:                                           ; preds = %entry
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  call void bitcast (void (...)* @callcase4 to void ()*)()
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  br label %sw.epilog
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sw.default:                                       ; preds = %entry
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  call void bitcast (void (...)* @calldefault to void ()*)()
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  br label %sw.epilog
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; CHECK-LABEL: sw.epilog:
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; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %entry ], [ @F1, %entry ]
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sw.epilog:                                        ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb
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  %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %sw.bb2 ], [ @F1, %sw.bb ]
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  %callee.knr.cast = bitcast void (...)* %fp.0 to void ()*
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  call void %callee.knr.cast()
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  ret i32 0
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}
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declare void @F1(...) local_unnamed_addr
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declare void @F2(...) local_unnamed_addr
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declare void @F3(...) local_unnamed_addr
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declare void @F4(...) local_unnamed_addr
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declare void @FD(...) local_unnamed_addr
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declare void @callcase3(...) local_unnamed_addr
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declare void @callcase4(...) local_unnamed_addr
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declare void @calldefault(...) local_unnamed_addr
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!0 = !{!"branch_weights", i32 5, i32 1, i32 1,i32 5, i32 5}
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!1 = !{!"branch_weights", i32 1 , i32 5, i32 1,i32 1, i32 1}
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!2 = !{!"branch_weights", i32 1 , i32 4, i32 1,i32 1, i32 1}
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; This test that BFI/BPI is created without any assertion in isMergingEmptyBlockProfitable()
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; in the case where empty blocks are removed before creating BFI/BPI.
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@b = common global i32 0, align 4
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@a = common global i32* null, align 8
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define i32 @should_not_assert(i32 %i) local_unnamed_addr {
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entry:
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  %0 = load i32, i32* @b, align 4
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  %cond = icmp eq i32 %0, 6
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  br i1 %cond, label %while.cond.preheader, label %sw.epilog
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while.cond.preheader:                             ; preds = %entry
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  %1 = load i32*, i32** @a, align 8
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  %magicptr = ptrtoint i32* %1 to i64
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  %arrayidx = getelementptr inbounds i32, i32* %1, i64 1
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  br label %while.cond
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while.cond:                                       ; preds = %while.cond.preheader, %land.rhs
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  switch i64 %magicptr, label %land.rhs [
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    i64 32, label %while.cond2.loopexit
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    i64 0, label %while.cond2.loopexit
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  ]
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land.rhs:                                         ; preds = %while.cond
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  %2 = load i32, i32* %arrayidx, align 4
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  %tobool1 = icmp eq i32 %2, 0
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  br i1 %tobool1, label %while.cond2thread-pre-split.loopexit, label %while.cond
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while.cond2thread-pre-split.loopexit:             ; preds = %land.rhs
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  br label %while.cond2thread-pre-split
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while.cond2thread-pre-split:                      ; preds = %while.cond2thread-pre-split.loopexit, %while.body4
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  %.pr = phi i32* [ %.pr.pre, %while.body4 ], [ %1, %while.cond2thread-pre-split.loopexit ]
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  br label %while.cond2
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while.cond2.loopexit:                             ; preds = %while.cond, %while.cond
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  br label %while.cond2
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while.cond2:                                      ; preds = %while.cond2.loopexit, %while.cond2thread-pre-split
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  %3 = phi i32* [ %.pr, %while.cond2thread-pre-split ], [ %1, %while.cond2.loopexit ]
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  %tobool3 = icmp eq i32* %3, null
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  br i1 %tobool3, label %sw.epilog, label %while.body4
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while.body4:                                      ; preds = %while.cond2
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  tail call void bitcast (void (...)* @fn2 to void ()*)()
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  %.pr.pre = load i32*, i32** @a, align 8
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  br label %while.cond2thread-pre-split
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sw.epilog:                                        ; preds = %while.cond2, %entry
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  ret i32 undef
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}
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declare void @fn2(...) local_unnamed_addr
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