104 lines
5.2 KiB
LLVM
104 lines
5.2 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=hawaii -enable-amdgpu-aa=0 -verify-machineinstrs -mattr=-promote-alloca,-load-store-opt < %s | FileCheck -check-prefix=GCN %s
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@sPrivateStorage = internal addrspace(3) global [256 x [8 x <4 x i64>]] undef
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; GCN-LABEL: {{^}}ds_reorder_vector_split:
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; Write zeroinitializer
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; GCN-DAG: ds_write_b64 [[PTR:v[0-9]+]], [[VAL:v\[[0-9]+:[0-9]+\]]] offset:24
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; GCN-DAG: ds_write_b64 [[PTR]], [[VAL]] offset:16
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; GCN-DAG: ds_write_b64 [[PTR]], [[VAL]] offset:8
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; GCN-DAG: ds_write_b64 [[PTR]], [[VAL]]{{$}}
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; GCN: s_waitcnt vmcnt
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; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:24
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; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:16
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; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:8
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; Appears to be dead store of vector component.
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; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]$}}
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; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:8
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; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:16
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; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:24
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; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
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; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8
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; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16
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; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:24
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; GCN: s_endpgm
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define amdgpu_kernel void @ds_reorder_vector_split(<4 x i64> addrspace(1)* nocapture readonly %srcValues, i32 addrspace(1)* nocapture readonly %offsets, <4 x i64> addrspace(1)* nocapture %destBuffer, i32 %alignmentOffset) #0 {
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entry:
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%tmp = tail call i32 @llvm.r600.read.local.size.y()
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%tmp1 = tail call i32 @llvm.r600.read.local.size.z()
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%tmp2 = tail call i32 @llvm.amdgcn.workitem.id.x()
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%tmp3 = tail call i32 @llvm.amdgcn.workitem.id.y()
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%tmp4 = tail call i32 @llvm.amdgcn.workitem.id.z()
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%tmp6 = mul i32 %tmp2, %tmp
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%tmp10 = add i32 %tmp3, %tmp6
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%tmp11 = mul i32 %tmp10, %tmp1
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%tmp9 = add i32 %tmp11, %tmp4
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%x.i.i = tail call i32 @llvm.amdgcn.workgroup.id.x() #1
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%x.i.12.i = tail call i32 @llvm.r600.read.local.size.x() #1
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%mul.26.i = mul i32 %x.i.12.i, %x.i.i
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%add.i = add i32 %tmp2, %mul.26.i
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%arrayidx = getelementptr [256 x [8 x <4 x i64>]], [256 x [8 x <4 x i64>]] addrspace(3)* @sPrivateStorage, i32 0, i32 %tmp9, i32 %add.i
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store <4 x i64> zeroinitializer, <4 x i64> addrspace(3)* %arrayidx
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%tmp12 = sext i32 %add.i to i64
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%arrayidx1 = getelementptr inbounds <4 x i64>, <4 x i64> addrspace(1)* %srcValues, i64 %tmp12
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%tmp13 = load <4 x i64>, <4 x i64> addrspace(1)* %arrayidx1
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%arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %offsets, i64 %tmp12
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%tmp14 = load i32, i32 addrspace(1)* %arrayidx2
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%add.ptr = getelementptr [256 x [8 x <4 x i64>]], [256 x [8 x <4 x i64>]] addrspace(3)* @sPrivateStorage, i32 0, i32 %tmp9, i32 0, i32 %alignmentOffset
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%mul.i = shl i32 %tmp14, 2
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%arrayidx.i = getelementptr inbounds i64, i64 addrspace(3)* %add.ptr, i32 %mul.i
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%tmp15 = bitcast i64 addrspace(3)* %arrayidx.i to <4 x i64> addrspace(3)*
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store <4 x i64> %tmp13, <4 x i64> addrspace(3)* %tmp15
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%add.ptr6 = getelementptr [256 x [8 x <4 x i64>]], [256 x [8 x <4 x i64>]] addrspace(3)* @sPrivateStorage, i32 0, i32 %tmp9, i32 %tmp14, i32 %alignmentOffset
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%tmp16 = sext i32 %tmp14 to i64
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%tmp17 = sext i32 %alignmentOffset to i64
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%add.ptr9 = getelementptr inbounds <4 x i64>, <4 x i64> addrspace(1)* %destBuffer, i64 %tmp16, i64 %tmp17
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%tmp18 = bitcast <4 x i64> %tmp13 to i256
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%trunc = trunc i256 %tmp18 to i64
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store i64 %trunc, i64 addrspace(1)* %add.ptr9
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%arrayidx10.1 = getelementptr inbounds i64, i64 addrspace(3)* %add.ptr6, i32 1
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%tmp19 = load i64, i64 addrspace(3)* %arrayidx10.1
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%arrayidx11.1 = getelementptr inbounds i64, i64 addrspace(1)* %add.ptr9, i64 1
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store i64 %tmp19, i64 addrspace(1)* %arrayidx11.1
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%arrayidx10.2 = getelementptr inbounds i64, i64 addrspace(3)* %add.ptr6, i32 2
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%tmp20 = load i64, i64 addrspace(3)* %arrayidx10.2
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%arrayidx11.2 = getelementptr inbounds i64, i64 addrspace(1)* %add.ptr9, i64 2
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store i64 %tmp20, i64 addrspace(1)* %arrayidx11.2
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%arrayidx10.3 = getelementptr inbounds i64, i64 addrspace(3)* %add.ptr6, i32 3
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%tmp21 = load i64, i64 addrspace(3)* %arrayidx10.3
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%arrayidx11.3 = getelementptr inbounds i64, i64 addrspace(1)* %add.ptr9, i64 3
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store i64 %tmp21, i64 addrspace(1)* %arrayidx11.3
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.amdgcn.workgroup.id.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.y() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.r600.read.local.size.z() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.amdgcn.workitem.id.y() #1
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; Function Attrs: nounwind readnone
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declare i32 @llvm.amdgcn.workitem.id.z() #1
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attributes #0 = { norecurse nounwind }
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attributes #1 = { nounwind readnone }
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