218 lines
6.7 KiB
LLVM
218 lines
6.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple riscv32-unknown-elf -o - %s \
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; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32
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; RUN: llc -mtriple riscv32-unknown-elf -mattr=+f -o - %s \
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; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32-F
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; RUN: llc -mtriple riscv32-unknown-elf -mattr=+f,+d -o - %s \
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; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32-FD
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;
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; TODO: Add RV64 tests when we can lower global addresses.
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; Checking all registers that are used are being saved.
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; This includes Caller (arguments and temps) and
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; Callee saved registers.
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;
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; extern int a, b, c;
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; __attribute__((interrupt)) void foo_no_call(void) {
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; c = a + b;
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; }
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;
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@a = external global i32
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@b = external global i32
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@c = external global i32
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define void @foo_i32() #0 {
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; CHECK-RV32-LABEL: foo_i32:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: addi sp, sp, -16
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; CHECK-RV32-NEXT: sw a0, 12(sp)
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; CHECK-RV32-NEXT: sw a1, 8(sp)
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; CHECK-RV32-NEXT: lui a0, %hi(a)
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; CHECK-RV32-NEXT: lw a0, %lo(a)(a0)
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; CHECK-RV32-NEXT: lui a1, %hi(b)
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; CHECK-RV32-NEXT: lw a1, %lo(b)(a1)
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; CHECK-RV32-NEXT: add a0, a1, a0
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; CHECK-RV32-NEXT: lui a1, %hi(c)
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; CHECK-RV32-NEXT: sw a0, %lo(c)(a1)
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; CHECK-RV32-NEXT: lw a1, 8(sp)
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; CHECK-RV32-NEXT: lw a0, 12(sp)
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; CHECK-RV32-NEXT: addi sp, sp, 16
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; CHECK-RV32-NEXT: mret
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;
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%1 = load i32, i32* @a
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%2 = load i32, i32* @b
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%add = add nsw i32 %2, %1
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store i32 %add, i32* @c
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ret void
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}
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;
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; Additionally check frame pointer and return address are properly saved.
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;
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define void @foo_fp_i32() #1 {
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; CHECK-RV32-LABEL: foo_fp_i32:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: addi sp, sp, -16
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; CHECK-RV32-NEXT: sw ra, 12(sp)
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; CHECK-RV32-NEXT: sw s0, 8(sp)
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; CHECK-RV32-NEXT: sw a0, 4(sp)
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; CHECK-RV32-NEXT: sw a1, 0(sp)
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; CHECK-RV32-NEXT: addi s0, sp, 16
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; CHECK-RV32-NEXT: lui a0, %hi(a)
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; CHECK-RV32-NEXT: lw a0, %lo(a)(a0)
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; CHECK-RV32-NEXT: lui a1, %hi(b)
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; CHECK-RV32-NEXT: lw a1, %lo(b)(a1)
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; CHECK-RV32-NEXT: add a0, a1, a0
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; CHECK-RV32-NEXT: lui a1, %hi(c)
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; CHECK-RV32-NEXT: sw a0, %lo(c)(a1)
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; CHECK-RV32-NEXT: lw a1, 0(sp)
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; CHECK-RV32-NEXT: lw a0, 4(sp)
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; CHECK-RV32-NEXT: lw s0, 8(sp)
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; CHECK-RV32-NEXT: lw ra, 12(sp)
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; CHECK-RV32-NEXT: addi sp, sp, 16
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; CHECK-RV32-NEXT: mret
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;
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%1 = load i32, i32* @a
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%2 = load i32, i32* @b
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%add = add nsw i32 %2, %1
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store i32 %add, i32* @c
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ret void
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}
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@e = external global float
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@f = external global float
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@d = external global float
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define void @foo_float() #0 {
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; CHECK-RV32-F-LABEL: foo_float:
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; CHECK-RV32-F: # %bb.0:
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; CHECK-RV32-F-NEXT: addi sp, sp, -16
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; CHECK-RV32-F-NEXT: sw a0, 12(sp)
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; CHECK-RV32-F-NEXT: fsw ft0, 8(sp)
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; CHECK-RV32-F-NEXT: fsw ft1, 4(sp)
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; CHECK-RV32-F-NEXT: lui a0, %hi(f)
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; CHECK-RV32-F-NEXT: flw ft0, %lo(f)(a0)
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; CHECK-RV32-F-NEXT: lui a0, %hi(e)
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; CHECK-RV32-F-NEXT: flw ft1, %lo(e)(a0)
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; CHECK-RV32-F-NEXT: fadd.s ft0, ft1, ft0
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; CHECK-RV32-F-NEXT: lui a0, %hi(d)
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; CHECK-RV32-F-NEXT: fsw ft0, %lo(d)(a0)
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; CHECK-RV32-F-NEXT: flw ft1, 4(sp)
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; CHECK-RV32-F-NEXT: flw ft0, 8(sp)
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; CHECK-RV32-F-NEXT: lw a0, 12(sp)
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; CHECK-RV32-F-NEXT: addi sp, sp, 16
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; CHECK-RV32-F-NEXT: mret
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;
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%1 = load float, float* @e
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%2 = load float, float* @f
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%add = fadd float %1, %2
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store float %add, float* @d
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ret void
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}
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;
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; Additionally check frame pointer and return address are properly saved.
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;
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define void @foo_fp_float() #1 {
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; CHECK-RV32-F-LABEL: foo_fp_float:
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; CHECK-RV32-F: # %bb.0:
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; CHECK-RV32-F-NEXT: addi sp, sp, -32
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; CHECK-RV32-F-NEXT: sw ra, 28(sp)
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; CHECK-RV32-F-NEXT: sw s0, 24(sp)
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; CHECK-RV32-F-NEXT: sw a0, 20(sp)
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; CHECK-RV32-F-NEXT: fsw ft0, 16(sp)
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; CHECK-RV32-F-NEXT: fsw ft1, 12(sp)
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; CHECK-RV32-F-NEXT: addi s0, sp, 32
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; CHECK-RV32-F-NEXT: lui a0, %hi(f)
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; CHECK-RV32-F-NEXT: flw ft0, %lo(f)(a0)
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; CHECK-RV32-F-NEXT: lui a0, %hi(e)
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; CHECK-RV32-F-NEXT: flw ft1, %lo(e)(a0)
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; CHECK-RV32-F-NEXT: fadd.s ft0, ft1, ft0
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; CHECK-RV32-F-NEXT: lui a0, %hi(d)
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; CHECK-RV32-F-NEXT: fsw ft0, %lo(d)(a0)
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; CHECK-RV32-F-NEXT: flw ft1, 12(sp)
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; CHECK-RV32-F-NEXT: flw ft0, 16(sp)
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; CHECK-RV32-F-NEXT: lw a0, 20(sp)
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; CHECK-RV32-F-NEXT: lw s0, 24(sp)
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; CHECK-RV32-F-NEXT: lw ra, 28(sp)
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; CHECK-RV32-F-NEXT: addi sp, sp, 32
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; CHECK-RV32-F-NEXT: mret
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;
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%1 = load float, float* @e
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%2 = load float, float* @f
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%add = fadd float %1, %2
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store float %add, float* @d
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ret void
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}
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@h = external global double
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@i = external global double
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@g = external global double
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define void @foo_double() #0 {
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; CHECK-RV32-FD-LABEL: foo_double:
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; CHECK-RV32-FD: # %bb.0:
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; CHECK-RV32-FD-NEXT: addi sp, sp, -32
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; CHECK-RV32-FD-NEXT: sw a0, 28(sp)
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; CHECK-RV32-FD-NEXT: fsd ft0, 16(sp)
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; CHECK-RV32-FD-NEXT: fsd ft1, 8(sp)
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; CHECK-RV32-FD-NEXT: lui a0, %hi(i)
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; CHECK-RV32-FD-NEXT: fld ft0, %lo(i)(a0)
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; CHECK-RV32-FD-NEXT: lui a0, %hi(h)
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; CHECK-RV32-FD-NEXT: fld ft1, %lo(h)(a0)
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; CHECK-RV32-FD-NEXT: fadd.d ft0, ft1, ft0
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; CHECK-RV32-FD-NEXT: lui a0, %hi(g)
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; CHECK-RV32-FD-NEXT: fsd ft0, %lo(g)(a0)
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; CHECK-RV32-FD-NEXT: fld ft1, 8(sp)
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; CHECK-RV32-FD-NEXT: fld ft0, 16(sp)
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; CHECK-RV32-FD-NEXT: lw a0, 28(sp)
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; CHECK-RV32-FD-NEXT: addi sp, sp, 32
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; CHECK-RV32-FD-NEXT: mret
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;
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%1 = load double, double* @h
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%2 = load double, double* @i
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%add = fadd double %1, %2
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store double %add, double* @g
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ret void
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}
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;
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; Additionally check frame pointer and return address are properly saved.
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;
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define void @foo_fp_double() #1 {
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; CHECK-RV32-FD-LABEL: foo_fp_double:
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; CHECK-RV32-FD: # %bb.0:
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; CHECK-RV32-FD-NEXT: addi sp, sp, -32
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; CHECK-RV32-FD-NEXT: sw ra, 28(sp)
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; CHECK-RV32-FD-NEXT: sw s0, 24(sp)
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; CHECK-RV32-FD-NEXT: sw a0, 20(sp)
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; CHECK-RV32-FD-NEXT: fsd ft0, 8(sp)
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; CHECK-RV32-FD-NEXT: fsd ft1, 0(sp)
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; CHECK-RV32-FD-NEXT: addi s0, sp, 32
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; CHECK-RV32-FD-NEXT: lui a0, %hi(i)
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; CHECK-RV32-FD-NEXT: fld ft0, %lo(i)(a0)
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; CHECK-RV32-FD-NEXT: lui a0, %hi(h)
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; CHECK-RV32-FD-NEXT: fld ft1, %lo(h)(a0)
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; CHECK-RV32-FD-NEXT: fadd.d ft0, ft1, ft0
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; CHECK-RV32-FD-NEXT: lui a0, %hi(g)
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; CHECK-RV32-FD-NEXT: fsd ft0, %lo(g)(a0)
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; CHECK-RV32-FD-NEXT: fld ft1, 0(sp)
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; CHECK-RV32-FD-NEXT: fld ft0, 8(sp)
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; CHECK-RV32-FD-NEXT: lw a0, 20(sp)
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; CHECK-RV32-FD-NEXT: lw s0, 24(sp)
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; CHECK-RV32-FD-NEXT: lw ra, 28(sp)
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; CHECK-RV32-FD-NEXT: addi sp, sp, 32
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; CHECK-RV32-FD-NEXT: mret
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;
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%1 = load double, double* @h
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%2 = load double, double* @i
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%add = fadd double %1, %2
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store double %add, double* @g
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ret void
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}
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attributes #0 = { "interrupt"="machine" }
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attributes #1 = { "interrupt"="machine" "no-frame-pointer-elim"="true" }
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