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llvm-project
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llvm
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test
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Disassembler
History
Matt Arsenault
ebfba7027e
AMDGPU: Change vintrp printing
...
llvm-svn: 289664
2016-12-14 16:36:12 +00:00
..
AArch64
AArch64: TableGenerate system instruction operands.
2016-07-05 21:23:04 +00:00
AMDGPU
AMDGPU: Change vintrp printing
2016-12-14 16:36:12 +00:00
ARM
[ARM] Saturation instructions are DSP-only
2016-07-25 22:25:25 +00:00
Hexagon
[Hexagon] Treat all conditional branches as predicted (not-taken by default)
2016-05-09 18:22:07 +00:00
Lanai
[lanai] Add Lanai backend.
2016-03-28 13:09:54 +00:00
Mips
[mips] Fix aui/daui/dahi/dati for MIPSR6
2016-10-14 09:31:42 +00:00
PowerPC
[PPC] add absolute difference altivec instructions and matching intrinsics
2016-10-31 19:47:52 +00:00
Sparc
This change adds co-processor condition branching and conditional traps to the Sparc back-end.
2016-03-09 18:20:21 +00:00
SystemZ
[SystemZ] Support remaining atomic instructions
2016-12-02 18:24:16 +00:00
X86
[AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.
2016-11-13 19:58:18 +00:00
XCore
…