.. |
AsmParser
|
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
|
2022-11-18 14:15:05 +03:00 |
Disassembler
|
[AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
|
2022-11-14 15:36:18 +00:00 |
MCA
|
[MCA] Introducing incremental SourceMgr and resumable pipeline
|
2022-06-24 15:39:51 -07:00 |
MCTargetDesc
|
[AMDGPU] Add & use `hasNamedOperand`, NFC
|
2022-11-08 07:57:21 +00:00 |
TargetInfo
|
…
|
|
Utils
|
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
|
2022-11-18 14:15:05 +03:00 |
AMDGPU.h
|
AMDGPU: Add a pass to rewrite certain undef in PHI
|
2022-09-26 09:54:47 +08:00 |
AMDGPU.td
|
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
|
2022-11-18 18:19:27 +01:00 |
AMDGPUAliasAnalysis.cpp
|
[AliasAnalysis] Introduce getModRefInfoMask() as a generalization of pointsToConstantMemory().
|
2022-10-31 13:03:41 -07:00 |
AMDGPUAliasAnalysis.h
|
[AliasAnalysis] Introduce getModRefInfoMask() as a generalization of pointsToConstantMemory().
|
2022-10-31 13:03:41 -07:00 |
AMDGPUAlwaysInlinePass.cpp
|
…
|
|
AMDGPUAnnotateKernelFeatures.cpp
|
…
|
|
AMDGPUAnnotateUniformValues.cpp
|
[AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues
|
2022-02-17 09:31:42 +00:00 |
AMDGPUArgumentUsageInfo.cpp
|
[amdgpu] Implement lds kernel id intrinsic
|
2022-07-19 17:46:19 +01:00 |
AMDGPUArgumentUsageInfo.h
|
[amdgpu] Implement lds kernel id intrinsic
|
2022-07-19 17:46:19 +01:00 |
AMDGPUAsmPrinter.cpp
|
AMDGPU: Register a null MC streamer for -emit-codegen-only
|
2022-10-28 16:39:09 -07:00 |
AMDGPUAsmPrinter.h
|
[AMDGPU] Add remarks to output some resource usage
|
2022-07-15 11:01:53 -07:00 |
AMDGPUAtomicOptimizer.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
AMDGPUAttributes.def
|
[amdgpu] Implement lds kernel id intrinsic
|
2022-07-19 17:46:19 +01:00 |
AMDGPUAttributor.cpp
|
[Attributor] Teach AAPointerInfo to look into aggregates
|
2022-10-05 06:19:47 -07:00 |
AMDGPUCallLowering.cpp
|
[amdgpu][nfc] Allocate kernel-specific LDS struct deterministically
|
2022-09-28 14:55:16 +01:00 |
AMDGPUCallLowering.h
|
…
|
|
AMDGPUCallingConv.td
|
[AMDGPU][NFC] Refactor AMDGPUCallingConv.td
|
2022-06-01 16:24:09 +00:00 |
AMDGPUCodeGenPrepare.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
AMDGPUCombine.td
|
[GlobalISel] Add Predicates to GICombineRule
|
2022-10-26 07:13:40 +00:00 |
AMDGPUCombinerHelper.cpp
|
…
|
|
AMDGPUCombinerHelper.h
|
…
|
|
AMDGPUCtorDtorLowering.cpp
|
AMDGPU: Don't crash on global_ctor/dtor declaration
|
2022-06-23 21:04:54 +08:00 |
AMDGPUExportClustering.cpp
|
…
|
|
AMDGPUExportClustering.h
|
…
|
|
AMDGPUFeatures.td
|
…
|
|
AMDGPUFrameLowering.cpp
|
[NFC][AMDGPU] Fix typo.
|
2022-08-20 08:30:42 +02:00 |
AMDGPUFrameLowering.h
|
…
|
|
AMDGPUGISel.td
|
[AMDGPU][GlobalISel] Support mad/fma_mix selection
|
2022-11-08 08:02:34 +00:00 |
AMDGPUGenRegisterBankInfo.def
|
…
|
|
AMDGPUGlobalISelUtils.cpp
|
[AMDGPU] Assume getDefIgnoringCopies will succeed. NFC.
|
2022-10-19 11:10:00 +01:00 |
AMDGPUGlobalISelUtils.h
|
[AMDGPU][CodeGen] Support (base | offset) SMEM loads.
|
2022-09-05 14:22:06 +01:00 |
AMDGPUHSAMetadataStreamer.cpp
|
[AMDGPU] Make the uses_dynamic_stack field in the kernel descriptor and the metadata map specific to code object v5 and later
|
2022-10-11 23:28:43 +05:30 |
AMDGPUHSAMetadataStreamer.h
|
[AMDGPU/Metadata] Rename HSAMD::MetadataStreamer classes
|
2022-09-06 16:46:37 -04:00 |
AMDGPUIGroupLP.cpp
|
[llvm] Use range-based for loops (NFC)
|
2022-09-03 23:27:25 -07:00 |
AMDGPUIGroupLP.h
|
[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy
|
2022-08-19 15:38:36 -07:00 |
AMDGPUISelDAGToDAG.cpp
|
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
|
2022-11-18 18:19:27 +01:00 |
AMDGPUISelDAGToDAG.h
|
[AMDGPU] Add GFX11 ds_bvh_stack_rtn_b32 instruction
|
2022-09-15 16:46:14 +01:00 |
AMDGPUISelLowering.cpp
|
[AMDGPU] Allow finer grain control of an unaligned access speed
|
2022-11-17 09:23:53 -08:00 |
AMDGPUISelLowering.h
|
[DAG] Enable combineShiftOfShiftedLogic folds after type legalization
|
2022-10-29 12:30:04 +01:00 |
AMDGPUInsertDelayAlu.cpp
|
[AMDGPU] New AMDGPUInsertDelayAlu pass
|
2022-06-29 21:30:20 +01:00 |
AMDGPUInstCombineIntrinsic.cpp
|
AMDGPU: Fold llvm.amdgcn.sqrt(undef)
|
2022-11-11 17:02:19 -08:00 |
AMDGPUInstrInfo.cpp
|
…
|
|
AMDGPUInstrInfo.h
|
…
|
|
AMDGPUInstrInfo.td
|
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
|
2022-03-09 12:18:02 +05:30 |
AMDGPUInstructionSelector.cpp
|
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
|
2022-11-18 18:19:27 +01:00 |
AMDGPUInstructionSelector.h
|
AMDGPU/GlobalISel: Fix crash after mad/fma_mix fails selection
|
2022-11-18 18:02:26 +01:00 |
AMDGPUInstructions.td
|
[AMDGPU] Use V_PERM to match buildvectors when inputs are not canonicalized (i.e. can't use V_PACK)
|
2022-10-03 12:58:29 -07:00 |
AMDGPULateCodeGenPrepare.cpp
|
…
|
|
AMDGPULegalizerInfo.cpp
|
AMDGPU/GlobalISel: Make strict fadd, fmul and fma legal
|
2022-11-17 20:50:04 -08:00 |
AMDGPULegalizerInfo.h
|
[AMDGPU] Always lower SHUFFLE_VECTOR
|
2022-10-04 14:23:17 +00:00 |
AMDGPULibCalls.cpp
|
try to fix build yet more after 16544cbe64
|
2022-09-28 15:40:52 -04:00 |
AMDGPULibFunc.cpp
|
[TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
|
2022-11-14 10:52:04 +01:00 |
AMDGPULibFunc.h
|
…
|
|
AMDGPULowerIntrinsics.cpp
|
[iwyu] Handle regressions in libLLVM header include
|
2022-05-04 08:32:38 +02:00 |
AMDGPULowerKernelArguments.cpp
|
[NFC] Simplify code
|
2022-06-20 15:15:52 +00:00 |
AMDGPULowerKernelAttributes.cpp
|
[NFC][AMDGPULowerKernelAttributes] Factorize repeated code into function
|
2022-10-05 09:26:39 -05:00 |
AMDGPULowerModuleLDSPass.cpp
|
Revert "[amdgpu][lds] Use the same isKernel predicate consistently"
|
2022-11-09 16:54:20 +00:00 |
AMDGPUMCInstLower.cpp
|
[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy
|
2022-08-19 15:38:36 -07:00 |
AMDGPUMCInstLower.h
|
AMDGPU: Fix missing c++ mode comment
|
2022-06-01 21:14:48 -04:00 |
AMDGPUMIRFormatter.cpp
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
AMDGPUMIRFormatter.h
|
[llvm] Remove redundaunt virtual specifiers (NFC)
|
2022-07-24 21:50:35 -07:00 |
AMDGPUMachineCFGStructurizer.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
AMDGPUMachineFunction.cpp
|
[AMDGPU] Move SIModeRegisterDefaults to SI MFI
|
2022-09-28 13:13:40 -07:00 |
AMDGPUMachineFunction.h
|
[AMDGPU] Move SIModeRegisterDefaults to SI MFI
|
2022-09-28 13:13:40 -07:00 |
AMDGPUMachineModuleInfo.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
AMDGPUMachineModuleInfo.h
|
[llvm] Use value instead of getValue (NFC)
|
2022-07-13 23:11:56 -07:00 |
AMDGPUMacroFusion.cpp
|
…
|
|
AMDGPUMacroFusion.h
|
…
|
|
AMDGPUOpenCLEnqueuedBlockLowering.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
AMDGPUPTNote.h
|
…
|
|
AMDGPUPerfHintAnalysis.cpp
|
[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access
|
2022-07-19 15:16:28 +05:30 |
AMDGPUPerfHintAnalysis.h
|
[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access
|
2022-07-19 15:16:28 +05:30 |
AMDGPUPostLegalizerCombiner.cpp
|
[GlobalISel] Add Predicates to GICombineRule
|
2022-10-26 07:13:40 +00:00 |
AMDGPUPreLegalizerCombiner.cpp
|
AMDGPU/GlobalISel: Fix combine crash because LI is not set in prelegalizer
|
2022-11-08 12:46:16 +01:00 |
AMDGPUPrintfRuntimeBinding.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
AMDGPUPromoteAlloca.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
AMDGPUPromoteKernelArguments.cpp
|
[AMDGPU] Set noclobber metadata on loads instead of cast to constant
|
2022-03-07 23:13:02 -08:00 |
AMDGPUPropagateAttributes.cpp
|
…
|
|
AMDGPURegBankCombiner.cpp
|
[GlobalISel] Allow prelegalizer combiners to have access to LegalizerInfo.
|
2022-10-03 07:36:18 +01:00 |
AMDGPURegisterBankInfo.cpp
|
AMDGPU/GlobalISel: Fix strictfp fmul
|
2022-11-18 08:53:49 -08:00 |
AMDGPURegisterBankInfo.h
|
AMDGPU: Add G_AMDGPU_MAD_64_32 instructions
|
2022-05-27 12:36:17 -05:00 |
AMDGPURegisterBanks.td
|
…
|
|
AMDGPUReleaseVGPRs.cpp
|
[AMDGPU][Backend] Fix user-after-free in AMDGPUReleaseVGPRs::isLastVGPRUseVMEMStore
|
2022-10-19 04:38:16 -05:00 |
AMDGPUReplaceLDSUseWithPointer.cpp
|
[amdgpu][nfc] Factor predicate out of findLDSVariablesToLower
|
2022-08-31 15:44:51 +01:00 |
AMDGPUResourceUsageAnalysis.cpp
|
[AMDGPU] Report minimum scratch size in code object v5 and later by default
|
2022-09-29 09:52:45 +05:30 |
AMDGPUResourceUsageAnalysis.h
|
…
|
|
AMDGPURewriteOutArguments.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
AMDGPURewriteUndefForPHI.cpp
|
Add override for runOnFunction()
|
2022-09-26 10:19:35 +08:00 |
AMDGPUSearchableTables.td
|
[AMDGPU] Support for gfx940 fp8 smfmac
|
2022-07-18 12:12:41 -07:00 |
AMDGPUSetWavePriority.cpp
|
[AMDGPU][SetWavePriority] Fix dealing with MBBInfo records.
|
2022-09-30 14:27:50 +01:00 |
AMDGPUSubtarget.cpp
|
[AMDGPU] Add MIMG NSA threshold configuration attribute
|
2022-09-28 20:03:18 +09:00 |
AMDGPUSubtarget.h
|
[AMDGPU] gfx11 subtarget features & early tests
|
2022-05-11 10:31:49 -04:00 |
AMDGPUTargetMachine.cpp
|
AMDGPU: Add a pass to rewrite certain undef in PHI
|
2022-09-26 09:54:47 +08:00 |
AMDGPUTargetMachine.h
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
AMDGPUTargetObjectFile.cpp
|
…
|
|
AMDGPUTargetObjectFile.h
|
…
|
|
AMDGPUTargetTransformInfo.cpp
|
AMDGPU: Fix DivergenceAnalysis for llvm.read_register
|
2022-11-07 10:42:35 -08:00 |
AMDGPUTargetTransformInfo.h
|
AMDGPU: Fix DivergenceAnalysis for llvm.read_register
|
2022-11-07 10:42:35 -08:00 |
AMDGPUUnifyDivergentExitNodes.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
AMDGPUUnifyMetadata.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
AMDKernelCodeT.h
|
[AMDGPU][NFC] Fix typos
|
2022-02-18 15:05:21 +01:00 |
BUFInstructions.td
|
[AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
|
2022-11-14 15:36:18 +00:00 |
CMakeLists.txt
|
AMDGPU: Add a pass to rewrite certain undef in PHI
|
2022-09-26 09:54:47 +08:00 |
CaymanInstructions.td
|
…
|
|
DSInstructions.td
|
[AMDGPU] Pattern for flat atomic fadd f64 intrinsic with local addr
|
2022-09-25 13:25:41 +02:00 |
EXPInstructions.td
|
[AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
|
2022-06-16 18:23:14 +01:00 |
EvergreenInstructions.td
|
R600: Remove broken atomicrmw patterns
|
2022-11-04 16:14:04 -07:00 |
FLATInstructions.td
|
AMDGPU: Use tablegen patterns for buffer global and flat atomic fadd
|
2022-09-23 17:52:10 +02:00 |
GCNCreateVOPD.cpp
|
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
|
2022-11-18 14:15:05 +03:00 |
GCNDPPCombine.cpp
|
[AMDGPU] Add & use `hasNamedOperand`, NFC
|
2022-11-08 07:57:21 +00:00 |
GCNHazardRecognizer.cpp
|
[AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
|
2022-11-17 16:45:48 +00:00 |
GCNHazardRecognizer.h
|
[AMDGPU][GFX11] Mitigate VALU mask write hazard
|
2022-10-01 16:21:24 +09:00 |
GCNILPSched.cpp
|
[llvm] Qualify auto in range-based for loops (NFC)
|
2022-08-13 12:55:42 -07:00 |
GCNIterativeScheduler.cpp
|
[AMDGPU] Refactor debug printing routines for GCNRPTracker
|
2022-10-28 04:22:46 +02:00 |
GCNIterativeScheduler.h
|
…
|
|
GCNMinRegStrategy.cpp
|
[llvm] Qualify auto in range-based for loops (NFC)
|
2022-08-13 12:55:42 -07:00 |
GCNNSAReassign.cpp
|
[AMDGPU] GFX11 CodeGen support for MIMG instructions
|
2022-06-16 18:23:14 +01:00 |
GCNPreRAOptimizations.cpp
|
…
|
|
GCNProcessors.td
|
[AMDGPU] user-sgpr-init16-bug does not apply to gfx1103
|
2022-07-29 14:21:13 +01:00 |
GCNRegPressure.cpp
|
[AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB
|
2022-11-03 11:52:56 +01:00 |
GCNRegPressure.h
|
[AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB
|
2022-11-03 11:52:56 +01:00 |
GCNSchedStrategy.cpp
|
[AMDGPU] Fix PreRARematStage::sinkTriviallyRematInsts region boundary update after sinking.
|
2022-11-18 12:13:14 +01:00 |
GCNSchedStrategy.h
|
[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy
|
2022-08-19 15:38:36 -07:00 |
GCNSubtarget.h
|
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
|
2022-11-18 18:19:27 +01:00 |
GCNVOPDUtils.cpp
|
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
|
2022-11-18 14:15:05 +03:00 |
GCNVOPDUtils.h
|
[AMDGPU] gfx11 Generate VOPD Instructions
|
2022-07-05 09:18:19 -04:00 |
InstCombineTables.td
|
…
|
|
LDSDIRInstructions.td
|
[AMDGPU] gfx11 ldsdir intrinsics and ISel
|
2022-06-17 09:03:16 -04:00 |
MIMGInstructions.td
|
[AMDGPU][MC] Correct image_gather4h
|
2022-10-11 14:41:27 +03:00 |
R600.h
|
[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer
|
2022-02-18 15:08:25 +00:00 |
R600.td
|
[AMDGPU] Fix useDeprecatedPositionallyEncodedOperands errors in R600.
|
2022-09-25 17:55:09 -04:00 |
R600AsmPrinter.cpp
|
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
|
2022-08-08 11:24:15 -07:00 |
R600AsmPrinter.h
|
…
|
|
R600ClauseMergePass.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
R600ControlFlowFinalizer.cpp
|
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
|
2022-08-08 11:24:15 -07:00 |
R600Defines.h
|
…
|
|
R600EmitClauseMarkers.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
R600ExpandSpecialInstrs.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
R600FrameLowering.cpp
|
Cleanup codegen includes
|
2022-03-16 08:43:00 +01:00 |
R600FrameLowering.h
|
…
|
|
R600ISelDAGToDAG.cpp
|
…
|
|
R600ISelLowering.cpp
|
[AMDGPU] Allow finer grain control of an unaligned access speed
|
2022-11-17 09:23:53 -08:00 |
R600ISelLowering.h
|
[AMDGPU] Allow finer grain control of an unaligned access speed
|
2022-11-17 09:23:53 -08:00 |
R600InstrFormats.td
|
…
|
|
R600InstrInfo.cpp
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
R600InstrInfo.h
|
CodeGen: Move getAddressSpaceForPseudoSourceKind into TargetMachine
|
2022-06-01 09:45:40 -04:00 |
R600InstrInfo.td
|
…
|
|
R600Instructions.td
|
[AMDGPU] Fix useDeprecatedPositionallyEncodedOperands errors in R600.
|
2022-09-25 17:55:09 -04:00 |
R600MCInstLower.cpp
|
[CodeGen] Move instruction predicate verification to emitInstruction
|
2022-07-14 09:33:28 +01:00 |
R600MachineCFGStructurizer.cpp
|
[AMDGPU] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds
|
2022-04-19 22:36:58 -07:00 |
R600MachineFunctionInfo.cpp
|
…
|
|
R600MachineFunctionInfo.h
|
…
|
|
R600MachineScheduler.cpp
|
…
|
|
R600MachineScheduler.h
|
…
|
|
R600OpenCLImageTypeLoweringPass.cpp
|
…
|
|
R600OptimizeVectorRegisters.cpp
|
…
|
|
R600Packetizer.cpp
|
[AMDGPU][NFC] Fix typos
|
2022-02-18 15:05:21 +01:00 |
R600Processors.td
|
…
|
|
R600RegisterInfo.cpp
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
R600RegisterInfo.h
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
R600RegisterInfo.td
|
…
|
|
R600Schedule.td
|
…
|
|
R600Subtarget.cpp
|
[AMDGPU] Use default member initializers in Subtarget classes
|
2022-04-12 16:42:30 +01:00 |
R600Subtarget.h
|
[AMDGPU] Use default member initializers in Subtarget classes
|
2022-04-12 16:42:30 +01:00 |
R600TargetMachine.cpp
|
mark getTargetTransformInfo and getTargetIRAnalysis as const
|
2022-02-25 14:30:44 -05:00 |
R600TargetMachine.h
|
mark getTargetTransformInfo and getTargetIRAnalysis as const
|
2022-02-25 14:30:44 -05:00 |
R600TargetTransformInfo.cpp
|
…
|
|
R600TargetTransformInfo.h
|
[AArch64][TTI][NFC] Overload method 'getVectorInstrCost' to provide vector instruction itself, as a context information for cost estimation.
|
2022-08-04 12:58:25 -07:00 |
R700Instructions.td
|
…
|
|
SIAnnotateControlFlow.cpp
|
AMDGPU: Create poison values instead of undef
|
2022-11-16 14:47:24 -08:00 |
SIDefines.h
|
[AMDGPU] gfx11 WMMA instruction support
|
2022-06-30 11:13:45 -04:00 |
SIFixSGPRCopies.cpp
|
[AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.
|
2022-09-19 23:31:45 +02:00 |
SIFixVGPRCopies.cpp
|
…
|
|
SIFoldOperands.cpp
|
[AMDGPU] Stop looking for implicit M0 uses on MOV instructions
|
2022-11-18 16:57:55 +00:00 |
SIFormMemoryClauses.cpp
|
[AMDGPU] Fix RP tracker's live registers after processing a memory clause.
|
2022-11-01 11:47:59 +01:00 |
SIFrameLowering.cpp
|
[AMDGPU] Skip stack-arg dbg objects while fixing the dead frame indices
|
2022-11-04 15:28:35 +05:30 |
SIFrameLowering.h
|
[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
|
2022-04-21 07:57:26 +05:30 |
SIISelLowering.cpp
|
AMDGPU: Fix fcanonicalize constant folding not correctly handling -0.0
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2022-11-18 10:03:29 -08:00 |
SIISelLowering.h
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[AMDGPU] Allow finer grain control of an unaligned access speed
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2022-11-17 09:23:53 -08:00 |
SIInsertHardClauses.cpp
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[AMDGPU] Update SIInsertHardClauses for GFX11
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2022-06-09 21:29:56 +01:00 |
SIInsertWaitcnts.cpp
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[AMDGPU] Declutter applyPreexistingWaitcnt()
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2022-11-08 11:51:16 +00:00 |
SIInstrFormats.td
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[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel
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2022-07-15 13:11:59 +03:00 |
SIInstrInfo.cpp
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[AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
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2022-11-17 16:45:48 +00:00 |
SIInstrInfo.h
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[AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
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2022-11-17 16:45:48 +00:00 |
SIInstrInfo.td
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[AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
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2022-11-14 15:36:18 +00:00 |
SIInstructions.td
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[AMDGPU] More use of DivergentBinFrag and friends. NFC.
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2022-11-14 15:44:27 +00:00 |
SILateBranchLowering.cpp
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[Target] Qualify auto in range-based for loops (NFC)
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2022-08-28 10:41:50 -07:00 |
SILoadStoreOptimizer.cpp
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[AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
|
2022-11-14 15:36:18 +00:00 |
SILowerControlFlow.cpp
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[AMDGPU] SILowerControlFlow uses LiveIntervals
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2022-07-12 16:53:53 +01:00 |
SILowerI1Copies.cpp
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AMDGPU: Factor out hasDivergentBranch(). NFC
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2022-09-14 13:27:21 +08:00 |
SILowerSGPRSpills.cpp
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[AMDGPU] Skip stack-arg dbg objects while fixing the dead frame indices
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2022-11-04 15:28:35 +05:30 |
SIMachineFunctionInfo.cpp
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AMDGPU: Directly pass Function to mayUseAGPRs
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2022-11-02 10:48:51 -07:00 |
SIMachineFunctionInfo.h
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[AMDGPU] Fix duplicated words in comments
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2022-11-03 15:33:30 +00:00 |
SIMachineScheduler.cpp
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[AMDGPU] SIMachineScheduler: Add support for several MachineScheduler features
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2022-07-14 09:45:31 +02:00 |
SIMachineScheduler.h
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…
|
|
SIMemoryLegalizer.cpp
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[AMDGPU][NFC] Fix typo in commment: replace SiMemOpInfo by SIMemOpInfo
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2022-09-02 16:45:10 +02:00 |
SIModeRegister.cpp
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[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,C
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2022-09-20 09:56:28 -04:00 |
SIOptimizeExecMasking.cpp
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[NFC][AMDGPU] Some cleanups in the SIOptimizeExecMasking pass.
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2022-08-23 18:16:47 +02:00 |
SIOptimizeExecMaskingPreRA.cpp
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AMDGPU: Fix assert when trying to overextend liverange
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2022-11-04 15:14:43 -07:00 |
SIOptimizeVGPRLiveRange.cpp
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[AMDGPU] Fix duplicated words in comments
|
2022-11-03 15:33:30 +00:00 |
SIPeepholeSDWA.cpp
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Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
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2022-11-17 10:01:40 +05:30 |
SIPostRABundler.cpp
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[AMDGPU] Use llvm::any_of (NFC)
|
2022-10-16 09:19:09 -07:00 |
SIPreAllocateWWMRegs.cpp
|
[AMDGPU] Add pseudo wavemode to optimize strict_wqm
|
2022-10-28 09:45:17 +09:00 |
SIPreEmitPeephole.cpp
|
[Target] Qualify auto in range-based for loops (NFC)
|
2022-08-28 10:41:50 -07:00 |
SIProgramInfo.cpp
|
…
|
|
SIProgramInfo.h
|
[AMDGPU] Add remarks to output some resource usage
|
2022-07-15 11:01:53 -07:00 |
SIRegisterInfo.cpp
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
SIRegisterInfo.h
|
PEI should be able to use backward walk in replaceFrameIndicesBackward.
|
2022-11-18 15:57:34 +01:00 |
SIRegisterInfo.td
|
[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,C
|
2022-09-20 09:56:28 -04:00 |
SISchedule.td
|
[AMDGPU] gfx11 subtarget features & early tests
|
2022-05-11 10:31:49 -04:00 |
SIShrinkInstructions.cpp
|
[AMDGPU] Stop looking for implicit M0 uses on MOV instructions
|
2022-11-18 16:57:55 +00:00 |
SIWholeQuadMode.cpp
|
[AMDGPU] Add pseudo wavemode to optimize strict_wqm
|
2022-10-28 09:45:17 +09:00 |
SMInstructions.td
|
[AMDGPU][CodeGen] Support (soffset + offset) s_buffer_load's.
|
2022-09-05 12:53:05 +01:00 |
SOPInstructions.td
|
[AMDGPU] Define and use UniformTernaryFrag. NFC.
|
2022-11-14 15:15:03 +00:00 |
VIInstrFormats.td
|
[AMDGPU] gfx11 export instructions
|
2022-05-25 14:44:09 -04:00 |
VINTERPInstructions.td
|
[AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands
|
2022-11-07 15:52:55 +03:00 |
VOP1Instructions.td
|
[AMDGPU] Make V_SAT_PK_U8_I16 a True16 Instruction
|
2022-10-10 10:33:49 -04:00 |
VOP2Instructions.td
|
[AMDGPU] More use of DivergentBinFrag and friends. NFC.
|
2022-11-14 15:44:27 +00:00 |
VOP3Instructions.td
|
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
|
2022-11-18 18:19:27 +01:00 |
VOP3PInstructions.td
|
[AMDGPU][GlobalISel] Support mad/fma_mix selection
|
2022-11-08 08:02:34 +00:00 |
VOPCInstructions.td
|
[AMDGPU][MC] Correct definition of aliases
|
2022-10-24 17:06:52 +03:00 |
VOPDInstructions.td
|
[AMDGPU] Fix delay alu for VOPD with src2acc
|
2022-10-25 13:11:17 -04:00 |
VOPInstructions.td
|
[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,C
|
2022-09-20 09:56:28 -04:00 |