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llvm-project/clang/test/CodeGen/RISCV
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Zakk Chen be947aded0 [RISCV][Clang] Add RVV vle/vse intrinsic functions. 
Add new field PermuteOperands to mapping different operand order between
C/C++ API and clang builtin.

Reviewed By: craig.topper, rogfer01

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Differential Revision: https://reviews.llvm.org/D98388
 		2021-03-17 20:31:25 -07:00
..
rvv-intrinsics [RISCV][Clang] Add RVV vle/vse intrinsic functions. 2021-03-17 20:31:25 -07:00
rvv-intrinsics-generic [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics. 2021-03-10 18:43:43 -08:00
riscv-atomics.c NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. 2021-02-11 17:35:09 -05:00
riscv-inline-asm.c
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riscv-metadata.c
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riscv-sdata-module-flag.c
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riscv-v-debuginfo.c [Clang][RISCV] Define RISC-V V builtin types 2021-02-18 10:17:31 +08:00
riscv32-ilp32-abi.c
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riscv32-ilp32-ilp32f-abi.c
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riscv32-ilp32-ilp32f-ilp32d-abi.c
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riscv32-ilp32d-abi.c
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riscv32-ilp32f-abi.c
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riscv32-ilp32f-ilp32d-abi.c
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riscv64-lp64-abi.c
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riscv64-lp64-lp64f-abi.c
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riscv64-lp64-lp64f-lp64d-abi.c
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riscv64-lp64d-abi.c
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riscv64-lp64f-lp64d-abi.c
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