131 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			131 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			LLVM
		
	
	
	
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -O3 -S < %s                    | FileCheck %s
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; RUN: opt -passes='default<O3>' -S < %s  | FileCheck %s
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; These are tests that check for set/clear bits in a bitfield based on PR37098:
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; https://bugs.llvm.org/show_bug.cgi?id=37098
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;
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; The initial IR from clang has been transformed by SROA, but no other passes
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; have run yet. In all cases, we should reduce these to a mask and compare
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; instead of shift/cast/logic ops.
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;
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; Currently, this happens mostly through a combination of instcombine and
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; aggressive-instcombine. If pass ordering changes, we may have to adjust
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; the pattern matching in 1 or both of those passes.
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; Legal i32 is required to allow casting transforms that eliminate the zexts.
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target datalayout = "n32"
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define i32 @allclear(i32 %a) {
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; CHECK-LABEL: @allclear(
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; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[A:%.*]], 15
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; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
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; CHECK-NEXT:    [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
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; CHECK-NEXT:    ret i32 [[TMP3]]
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;
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  %a.sroa.0.0.trunc = trunc i32 %a to i8
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  %a.sroa.5.0.shift = lshr i32 %a, 8
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  %bf.clear = and i8 %a.sroa.0.0.trunc, 1
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  %bf.cast = zext i8 %bf.clear to i32
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  %bf.lshr = lshr i8 %a.sroa.0.0.trunc, 1
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  %bf.clear2 = and i8 %bf.lshr, 1
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  %bf.cast3 = zext i8 %bf.clear2 to i32
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  %or = or i32 %bf.cast, %bf.cast3
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  %bf.lshr5 = lshr i8 %a.sroa.0.0.trunc, 2
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  %bf.clear6 = and i8 %bf.lshr5, 1
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  %bf.cast7 = zext i8 %bf.clear6 to i32
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  %or8 = or i32 %or, %bf.cast7
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  %bf.lshr10 = lshr i8 %a.sroa.0.0.trunc, 3
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  %bf.clear11 = and i8 %bf.lshr10, 1
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  %bf.cast12 = zext i8 %bf.clear11 to i32
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  %or13 = or i32 %or8, %bf.cast12
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  %cmp = icmp eq i32 %or13, 0
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  %conv = zext i1 %cmp to i32
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  ret i32 %conv
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}
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define i32 @anyset(i32 %a) {
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; CHECK-LABEL: @anyset(
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; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[A:%.*]], 15
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; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
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; CHECK-NEXT:    [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
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; CHECK-NEXT:    ret i32 [[TMP3]]
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;
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  %a.sroa.0.0.trunc = trunc i32 %a to i8
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  %a.sroa.5.0.shift = lshr i32 %a, 8
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  %bf.clear = and i8 %a.sroa.0.0.trunc, 1
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  %bf.cast = zext i8 %bf.clear to i32
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  %bf.lshr = lshr i8 %a.sroa.0.0.trunc, 1
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  %bf.clear2 = and i8 %bf.lshr, 1
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  %bf.cast3 = zext i8 %bf.clear2 to i32
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  %or = or i32 %bf.cast, %bf.cast3
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  %bf.lshr5 = lshr i8 %a.sroa.0.0.trunc, 2
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  %bf.clear6 = and i8 %bf.lshr5, 1
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  %bf.cast7 = zext i8 %bf.clear6 to i32
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  %or8 = or i32 %or, %bf.cast7
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  %bf.lshr10 = lshr i8 %a.sroa.0.0.trunc, 3
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  %bf.clear11 = and i8 %bf.lshr10, 1
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  %bf.cast12 = zext i8 %bf.clear11 to i32
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  %or13 = or i32 %or8, %bf.cast12
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  %cmp = icmp ne i32 %or13, 0
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  %conv = zext i1 %cmp to i32
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  ret i32 %conv
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}
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define i32 @allset(i32 %a) {
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; CHECK-LABEL: @allset(
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; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[A:%.*]], 15
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; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15
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; CHECK-NEXT:    [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
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; CHECK-NEXT:    ret i32 [[TMP3]]
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;
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  %a.sroa.0.0.trunc = trunc i32 %a to i8
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  %a.sroa.5.0.shift = lshr i32 %a, 8
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  %bf.clear = and i8 %a.sroa.0.0.trunc, 1
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  %bf.cast = zext i8 %bf.clear to i32
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  %bf.lshr = lshr i8 %a.sroa.0.0.trunc, 1
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  %bf.clear2 = and i8 %bf.lshr, 1
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  %bf.cast3 = zext i8 %bf.clear2 to i32
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  %and = and i32 %bf.cast, %bf.cast3
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  %bf.lshr5 = lshr i8 %a.sroa.0.0.trunc, 2
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  %bf.clear6 = and i8 %bf.lshr5, 1
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  %bf.cast7 = zext i8 %bf.clear6 to i32
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  %and8 = and i32 %and, %bf.cast7
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  %bf.lshr10 = lshr i8 %a.sroa.0.0.trunc, 3
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  %bf.clear11 = and i8 %bf.lshr10, 1
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  %bf.cast12 = zext i8 %bf.clear11 to i32
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  %and13 = and i32 %and8, %bf.cast12
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  %cmp = icmp ne i32 %and13, 0
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  %conv = zext i1 %cmp to i32
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  ret i32 %conv
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}
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define i32 @anyclear(i32 %a) {
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; CHECK-LABEL: @anyclear(
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; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[A:%.*]], 15
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; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 15
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; CHECK-NEXT:    [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
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; CHECK-NEXT:    ret i32 [[TMP3]]
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;
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  %a.sroa.0.0.trunc = trunc i32 %a to i8
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  %a.sroa.5.0.shift = lshr i32 %a, 8
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  %bf.clear = and i8 %a.sroa.0.0.trunc, 1
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  %bf.cast = zext i8 %bf.clear to i32
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  %bf.lshr = lshr i8 %a.sroa.0.0.trunc, 1
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  %bf.clear2 = and i8 %bf.lshr, 1
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  %bf.cast3 = zext i8 %bf.clear2 to i32
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  %and = and i32 %bf.cast, %bf.cast3
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  %bf.lshr5 = lshr i8 %a.sroa.0.0.trunc, 2
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  %bf.clear6 = and i8 %bf.lshr5, 1
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  %bf.cast7 = zext i8 %bf.clear6 to i32
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  %and8 = and i32 %and, %bf.cast7
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  %bf.lshr10 = lshr i8 %a.sroa.0.0.trunc, 3
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  %bf.clear11 = and i8 %bf.lshr10, 1
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  %bf.cast12 = zext i8 %bf.clear11 to i32
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  %and13 = and i32 %and8, %bf.cast12
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  %cmp = icmp eq i32 %and13, 0
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  %conv = zext i1 %cmp to i32
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  ret i32 %conv
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}
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