67 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			67 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
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; Checks how NVPTX lowers alloca buffers and their passing to functions.
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;
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; Produced with the following CUDA code:
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;  extern "C" __attribute__((device)) void callee(float* f, char* buf);
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;
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;  extern "C" __attribute__((global)) void kernel_func(float* a) {
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;    char buf[4 * sizeof(float)];
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;    *(reinterpret_cast<float*>(&buf[0])) = a[0];
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;    *(reinterpret_cast<float*>(&buf[1])) = a[1];
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;    *(reinterpret_cast<float*>(&buf[2])) = a[2];
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;    *(reinterpret_cast<float*>(&buf[3])) = a[3];
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;    callee(a, buf);
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;  }
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; CHECK: .visible .entry kernel_func
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define void @kernel_func(float* %a) {
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entry:
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  %buf = alloca [16 x i8], align 4
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; CHECK: .local .align 4 .b8 	__local_depot0[16]
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; CHECK: mov.u64 %rl[[BUF_REG:[0-9]+]]
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; CHECK: cvta.local.u64 %SP, %rl[[BUF_REG]]
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; CHECK: ld.param.u64 %rl[[A_REG:[0-9]+]], [kernel_func_param_0]
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; CHECK: ld.f32 %f[[A0_REG:[0-9]+]], [%rl[[A_REG]]]
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; CHECK: st.f32 [%SP+0], %f[[A0_REG]]
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  %0 = load float* %a, align 4
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  %1 = bitcast [16 x i8]* %buf to float*
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  store float %0, float* %1, align 4
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  %arrayidx2 = getelementptr inbounds float* %a, i64 1
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  %2 = load float* %arrayidx2, align 4
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  %arrayidx3 = getelementptr inbounds [16 x i8]* %buf, i64 0, i64 1
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  %3 = bitcast i8* %arrayidx3 to float*
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  store float %2, float* %3, align 4
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  %arrayidx4 = getelementptr inbounds float* %a, i64 2
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  %4 = load float* %arrayidx4, align 4
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  %arrayidx5 = getelementptr inbounds [16 x i8]* %buf, i64 0, i64 2
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  %5 = bitcast i8* %arrayidx5 to float*
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  store float %4, float* %5, align 4
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  %arrayidx6 = getelementptr inbounds float* %a, i64 3
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  %6 = load float* %arrayidx6, align 4
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  %arrayidx7 = getelementptr inbounds [16 x i8]* %buf, i64 0, i64 3
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  %7 = bitcast i8* %arrayidx7 to float*
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  store float %6, float* %7, align 4
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; CHECK: add.u64 %rl[[SP_REG:[0-9]+]], %SP, 0
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; CHECK:        .param .b64 param0;
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; CHECK-NEXT:   st.param.b64  [param0+0], %rl[[A_REG]]
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; CHECK-NEXT:   .param .b64 param1;
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; CHECK-NEXT:   st.param.b64  [param1+0], %rl[[SP_REG]]
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; CHECK-NEXT:   call.uni
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; CHECK-NEXT:   callee,
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  %arraydecay = getelementptr inbounds [16 x i8]* %buf, i64 0, i64 0
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  call void @callee(float* %a, i8* %arraydecay) #2
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  ret void
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}
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declare void @callee(float*, i8*)
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!nvvm.annotations = !{!0}
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!0 = metadata !{void (float*)* @kernel_func, metadata !"kernel", i32 1}
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