408 lines
17 KiB
LLVM
408 lines
17 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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define <4 x float> @test1(<4 x float> %v1) {
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; CHECK-LABEL: @test1(
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; CHECK: ret <4 x float> %v1
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%v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x float> %v2
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}
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define <4 x float> @test2(<4 x float> %v1) {
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; CHECK-LABEL: @test2(
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; CHECK: ret <4 x float> %v1
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%v2 = shufflevector <4 x float> %v1, <4 x float> %v1, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x float> %v2
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}
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define float @test3(<4 x float> %A, <4 x float> %B, float %f) {
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; CHECK-LABEL: @test3(
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; CHECK: ret float %f
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%C = insertelement <4 x float> %A, float %f, i32 0
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%D = shufflevector <4 x float> %C, <4 x float> %B, <4 x i32> <i32 5, i32 0, i32 2, i32 7>
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%E = extractelement <4 x float> %D, i32 1
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ret float %E
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}
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define i32 @test4(<4 x i32> %X) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
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ret i32 %tmp34
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}
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define i32 @test5(<4 x i32> %X) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 undef>
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%tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
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ret i32 %tmp34
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}
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define float @test6(<4 x float> %X) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%X1 = bitcast <4 x float> %X to <4 x i32>
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%tmp152.i53899.i = shufflevector <4 x i32> %X1, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp152.i53900.i = bitcast <4 x i32> %tmp152.i53899.i to <4 x float>
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%tmp34 = extractelement <4 x float> %tmp152.i53900.i, i32 0
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ret float %tmp34
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}
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define <4 x float> @test7(<4 x float> %tmp45.i) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: ret <4 x float> %tmp45.i
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%tmp1642.i = shufflevector <4 x float> %tmp45.i, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 6, i32 7 >
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ret <4 x float> %tmp1642.i
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}
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; This should turn into a single shuffle.
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define <4 x float> @test8(<4 x float> %tmp, <4 x float> %tmp1) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp4 = extractelement <4 x float> %tmp, i32 1
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%tmp2 = extractelement <4 x float> %tmp, i32 3
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%tmp1.upgrd.1 = extractelement <4 x float> %tmp1, i32 0
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%tmp128 = insertelement <4 x float> undef, float %tmp4, i32 0
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%tmp130 = insertelement <4 x float> %tmp128, float undef, i32 1
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%tmp132 = insertelement <4 x float> %tmp130, float %tmp2, i32 2
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%tmp134 = insertelement <4 x float> %tmp132, float %tmp1.upgrd.1, i32 3
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ret <4 x float> %tmp134
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}
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; Test fold of two shuffles where the first shuffle vectors inputs are a
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; different length then the second.
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define <4 x i8> @test9(<16 x i8> %tmp6) nounwind {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 > ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Same as test9, but make sure that "undef" mask values are not confused with
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; mask values of 2*N, where N is the mask length. These shuffles should not
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; be folded (because [8,9,4,8] may not be a mask supported by the target).
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define <4 x i8> @test9a(<16 x i8> %tmp6) nounwind {
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; CHECK-LABEL: @test9a(
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 undef, i32 9, i32 4, i32 8 > ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Test fold of two shuffles where the first shuffle vectors inputs are a
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; different length then the second.
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define <4 x i8> @test9b(<4 x i8> %tmp6, <4 x i8> %tmp7) nounwind {
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; CHECK-LABEL: @test9b(
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <4 x i8> %tmp6, <4 x i8> %tmp7, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 2, i32 3> ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Redundant vector splats should be removed. Radar 8597790.
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define <4 x i32> @test10(<4 x i32> %tmp5) nounwind {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer
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ret <4 x i32> %tmp7
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}
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; Test fold of two shuffles where the two shufflevector inputs's op1 are
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; the same
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define <8 x i8> @test11(<16 x i8> %tmp6) nounwind {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: shufflevector <16 x i8> %tmp6, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x i8>> [#uses=1]
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%tmp2 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> ; <<4 x i8>> [#uses=1]
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%tmp3 = shufflevector <4 x i8> %tmp1, <4 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ; <<8 x i8>> [#uses=1]
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ret <8 x i8> %tmp3
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}
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; Test fold of two shuffles where the first shufflevector's inputs are
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; the same as the second
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define <8 x i8> @test12(<8 x i8> %tmp6, <8 x i8> %tmp2) nounwind {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: shufflevector <8 x i8> %tmp6, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 8, i32 11, i32 12>
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 undef, i32 7> ; <<8 x i8>> [#uses=1]
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%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 8, i32 11, i32 12> ; <<8 x i8>> [#uses=1]
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ret <8 x i8> %tmp3
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}
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; Test fold of two shuffles where the first shufflevector's inputs are
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; the same as the second
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define <8 x i8> @test12a(<8 x i8> %tmp6, <8 x i8> %tmp2) nounwind {
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; CHECK-LABEL: @test12a(
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; CHECK-NEXT: shufflevector <8 x i8> %tmp2, <8 x i8> %tmp6, <8 x i32> <i32 0, i32 3, i32 1, i32 4, i32 8, i32 9, i32 10, i32 11>
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 undef, i32 7> ; <<8 x i8>> [#uses=1]
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%tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> %tmp1, <8 x i32> <i32 0, i32 3, i32 1, i32 4, i32 8, i32 9, i32 10, i32 11> ; <<8 x i8>> [#uses=1]
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ret <8 x i8> %tmp3
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}
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define <2 x i8> @test13a(i8 %x1, i8 %x2) {
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; CHECK-LABEL: @test13a(
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; CHECK-NEXT: insertelement {{.*}} undef, i8 %x1, i32 1
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; CHECK-NEXT: insertelement {{.*}} i8 %x2, i32 0
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; CHECK-NEXT: add {{.*}} <i8 7, i8 5>
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; CHECK-NEXT: ret
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%A = insertelement <2 x i8> undef, i8 %x1, i32 0
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%B = insertelement <2 x i8> %A, i8 %x2, i32 1
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%C = add <2 x i8> %B, <i8 5, i8 7>
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%D = shufflevector <2 x i8> %C, <2 x i8> undef, <2 x i32> <i32 1, i32 0>
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ret <2 x i8> %D
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}
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define <2 x i8> @test13b(i8 %x) {
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; CHECK-LABEL: @test13b(
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; CHECK-NEXT: insertelement <2 x i8> undef, i8 %x, i32 1
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; CHECK-NEXT: ret
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%A = insertelement <2 x i8> undef, i8 %x, i32 0
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%B = shufflevector <2 x i8> %A, <2 x i8> undef, <2 x i32> <i32 undef, i32 0>
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ret <2 x i8> %B
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}
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define <2 x i8> @test13c(i8 %x1, i8 %x2) {
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; CHECK-LABEL: @test13c(
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; CHECK-NEXT: insertelement <2 x i8> {{.*}}, i32 0
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; CHECK-NEXT: insertelement <2 x i8> {{.*}}, i32 1
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; CHECK-NEXT: ret
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%A = insertelement <4 x i8> undef, i8 %x1, i32 0
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%B = insertelement <4 x i8> %A, i8 %x2, i32 2
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%C = shufflevector <4 x i8> %B, <4 x i8> undef, <2 x i32> <i32 0, i32 2>
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ret <2 x i8> %C
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}
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define void @test14(i16 %conv10) {
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%tmp = alloca <4 x i16>, align 8
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%vecinit6 = insertelement <4 x i16> undef, i16 23, i32 3
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store <4 x i16> %vecinit6, <4 x i16>* undef
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%tmp1 = load <4 x i16>* undef
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%vecinit11 = insertelement <4 x i16> undef, i16 %conv10, i32 3
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%div = udiv <4 x i16> %tmp1, %vecinit11
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store <4 x i16> %div, <4 x i16>* %tmp
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%tmp4 = load <4 x i16>* %tmp
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%tmp5 = shufflevector <4 x i16> %tmp4, <4 x i16> undef, <2 x i32> <i32 2, i32 0>
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%cmp = icmp ule <2 x i16> %tmp5, undef
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%sext = sext <2 x i1> %cmp to <2 x i16>
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ret void
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}
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; Check that sequences of insert/extract element are
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; collapsed into valid shuffle instruction with correct shuffle indexes.
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define <4 x float> @test15a(<4 x float> %LHS, <4 x float> %RHS) {
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; CHECK-LABEL: @test15a
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; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 0, i32 6, i32 6>
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; CHECK-NEXT: ret <4 x float> %tmp4
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%tmp1 = extractelement <4 x float> %LHS, i32 0
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%tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1
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%tmp3 = extractelement <4 x float> %RHS, i32 2
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%tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3
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ret <4 x float> %tmp4
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}
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define <4 x float> @test15b(<4 x float> %LHS, <4 x float> %RHS) {
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; CHECK-LABEL: @test15b
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; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 3, i32 6, i32 6>
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; CHECK-NEXT: ret <4 x float> %tmp5
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%tmp0 = extractelement <4 x float> %LHS, i32 3
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%tmp1 = insertelement <4 x float> %RHS, float %tmp0, i32 0
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%tmp2 = extractelement <4 x float> %tmp1, i32 0
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%tmp3 = insertelement <4 x float> %RHS, float %tmp2, i32 1
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%tmp4 = extractelement <4 x float> %RHS, i32 2
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%tmp5 = insertelement <4 x float> %tmp3, float %tmp4, i32 3
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ret <4 x float> %tmp5
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}
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define <1 x i32> @test16a(i32 %ele) {
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; CHECK-LABEL: @test16a(
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; CHECK-NEXT: ret <1 x i32> <i32 2>
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%tmp0 = insertelement <2 x i32> <i32 1, i32 undef>, i32 %ele, i32 1
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%tmp1 = shl <2 x i32> %tmp0, <i32 1, i32 1>
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%tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <1 x i32> <i32 0>
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ret <1 x i32> %tmp2
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}
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define <4 x i8> @test16b(i8 %ele) {
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; CHECK-LABEL: @test16b(
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; CHECK-NEXT: ret <4 x i8> <i8 2, i8 2, i8 2, i8 2>
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%tmp0 = insertelement <8 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 undef, i8 1>, i8 %ele, i32 6
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%tmp1 = shl <8 x i8> %tmp0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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%tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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ret <4 x i8> %tmp2
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}
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; If composition of two shuffles is identity, shuffles can be removed.
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define <4 x i32> @shuffle_17ident(<4 x i32> %v) nounwind uwtable {
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; CHECK-LABEL: @shuffle_17ident(
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; CHECK-NOT: shufflevector
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%shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%shuffle2 = shufflevector <4 x i32> %shuffle, <4 x i32> zeroinitializer,
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<4 x i32> <i32 3, i32 0, i32 1, i32 2>
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ret <4 x i32> %shuffle2
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}
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; swizzle can be put after operation
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define <4 x i32> @shuffle_17and(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
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; CHECK-LABEL: @shuffle_17and(
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; CHECK-NOT: shufflevector
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; CHECK: and <4 x i32> %v1, %v2
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; CHECK: shufflevector
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%t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%r = and <4 x i32> %t1, %t2
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ret <4 x i32> %r
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}
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define <4 x i32> @shuffle_17add(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
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; CHECK-LABEL: @shuffle_17add(
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; CHECK-NOT: shufflevector
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; CHECK: add <4 x i32> %v1, %v2
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; CHECK: shufflevector
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%t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%r = add <4 x i32> %t1, %t2
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ret <4 x i32> %r
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}
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define <4 x i32> @shuffle_17addnsw(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
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; CHECK-LABEL: @shuffle_17addnsw(
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; CHECK-NOT: shufflevector
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; CHECK: add nsw <4 x i32> %v1, %v2
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; CHECK: shufflevector
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%t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%r = add nsw <4 x i32> %t1, %t2
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ret <4 x i32> %r
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}
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define <4 x i32> @shuffle_17addnuw(<4 x i32> %v1, <4 x i32> %v2) nounwind uwtable {
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; CHECK-LABEL: @shuffle_17addnuw(
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; CHECK-NOT: shufflevector
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; CHECK: add nuw <4 x i32> %v1, %v2
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; CHECK: shufflevector
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%t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%t2 = shufflevector <4 x i32> %v2, <4 x i32> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%r = add nuw <4 x i32> %t1, %t2
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ret <4 x i32> %r
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}
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define <4 x float> @shuffle_17fsub(<4 x float> %v1, <4 x float> %v2) nounwind uwtable {
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; CHECK-LABEL: @shuffle_17fsub(
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; CHECK-NOT: shufflevector
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; CHECK: fsub <4 x float> %v1, %v2
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; CHECK: shufflevector
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%t1 = shufflevector <4 x float> %v1, <4 x float> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%t2 = shufflevector <4 x float> %v2, <4 x float> zeroinitializer,
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<4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%r = fsub <4 x float> %t1, %t2
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|
ret <4 x float> %r
|
|
}
|
|
|
|
define <4 x i32> @shuffle_17addconst(<4 x i32> %v1, <4 x i32> %v2) {
|
|
; CHECK-LABEL: @shuffle_17addconst(
|
|
; CHECK-NOT: shufflevector
|
|
; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = add <4 x i32> %v1, <i32 4, i32 1, i32 2, i32 3>
|
|
; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = shufflevector <4 x i32> [[VAR1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
|
|
; CHECK: ret <4 x i32> [[VAR2]]
|
|
%t1 = shufflevector <4 x i32> %v1, <4 x i32> zeroinitializer,
|
|
<4 x i32> <i32 1, i32 2, i32 3, i32 0>
|
|
%r = add <4 x i32> %t1, <i32 1, i32 2, i32 3, i32 4>
|
|
ret <4 x i32> %r
|
|
}
|
|
|
|
define <4 x i32> @shuffle_17add2(<4 x i32> %v) {
|
|
; CHECK-LABEL: @shuffle_17add2(
|
|
; CHECK-NOT: shufflevector
|
|
; CHECK: [[VAR:%[a-zA-Z0-9.]+]] = shl <4 x i32> %v, <i32 1, i32 1, i32 1, i32 1>
|
|
; CHECK: ret <4 x i32> [[VAR]]
|
|
%t1 = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer,
|
|
<4 x i32> <i32 3, i32 2, i32 1, i32 0>
|
|
%t2 = add <4 x i32> %t1, %t1
|
|
%r = shufflevector <4 x i32> %t2, <4 x i32> zeroinitializer,
|
|
<4 x i32> <i32 3, i32 2, i32 1, i32 0>
|
|
ret <4 x i32> %r
|
|
}
|
|
|
|
define <4 x i32> @shuffle_17mulsplat(<4 x i32> %v) {
|
|
; CHECK-LABEL: @shuffle_17mulsplat(
|
|
; CHECK-NOT: shufflevector
|
|
; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = mul <4 x i32> %v, %v
|
|
; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = shufflevector <4 x i32> [[VAR1]], <4 x i32> undef, <4 x i32> zeroinitializer
|
|
; CHECK: ret <4 x i32> [[VAR2]]
|
|
%s1 = shufflevector <4 x i32> %v,
|
|
<4 x i32> zeroinitializer,
|
|
<4 x i32> zeroinitializer
|
|
%m1 = mul <4 x i32> %s1, %s1
|
|
%s2 = shufflevector <4 x i32> %m1,
|
|
<4 x i32> zeroinitializer,
|
|
<4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
|
ret <4 x i32> %s2
|
|
}
|
|
|
|
; Do not reorder shuffle and binop if LHS of shuffles are of different size
|
|
define <2 x i32> @pr19717(<4 x i32> %in0, <2 x i32> %in1) {
|
|
; CHECK-LABEL: @pr19717(
|
|
; CHECK: shufflevector
|
|
; CHECK: shufflevector
|
|
; CHECK: mul
|
|
%shuffle = shufflevector <4 x i32> %in0, <4 x i32> %in0, <2 x i32> zeroinitializer
|
|
%shuffle4 = shufflevector <2 x i32> %in1, <2 x i32> %in1, <2 x i32> zeroinitializer
|
|
%mul = mul <2 x i32> %shuffle, %shuffle4
|
|
ret <2 x i32> %mul
|
|
}
|
|
|
|
define <4 x i16> @pr19717a(<8 x i16> %in0, <8 x i16> %in1) {
|
|
; CHECK-LABEL: @pr19717a(
|
|
; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = mul <8 x i16> %in0, %in1
|
|
; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = shufflevector <8 x i16> [[VAR1]], <8 x i16> undef, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
|
|
; CHECK: ret <4 x i16> [[VAR2]]
|
|
%shuffle = shufflevector <8 x i16> %in0, <8 x i16> %in0, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
|
|
%shuffle1 = shufflevector <8 x i16> %in1, <8 x i16> %in1, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
|
|
%mul = mul <4 x i16> %shuffle, %shuffle1
|
|
ret <4 x i16> %mul
|
|
}
|
|
|
|
define <8 x i8> @pr19730(<16 x i8> %in0) {
|
|
; CHECK-LABEL: @pr19730(
|
|
; CHECK: shufflevector
|
|
%shuffle = shufflevector <16 x i8> %in0, <16 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
|
%shuffle1 = shufflevector <8 x i8> %shuffle, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
|
ret <8 x i8> %shuffle1
|
|
}
|
|
|
|
define i32 @pr19737(<4 x i32> %in0) {
|
|
; CHECK-LABEL: @pr19737(
|
|
; CHECK: [[VAR:%[a-zA-Z0-9.]+]] = extractelement <4 x i32> %in0, i32 0
|
|
; CHECK: ret i32 [[VAR]]
|
|
%shuffle.i = shufflevector <4 x i32> zeroinitializer, <4 x i32> %in0, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
|
|
%neg.i = xor <4 x i32> %shuffle.i, <i32 -1, i32 -1, i32 -1, i32 -1>
|
|
%and.i = and <4 x i32> %in0, %neg.i
|
|
%rv = extractelement <4 x i32> %and.i, i32 0
|
|
ret i32 %rv
|
|
}
|