llvm-project/llvm/test/CodeGen
Krzysztof Parzyszek 545a68ca4b [Hexagon] Add instruction definitions for Hexagon V66
llvm-svn: 348411
2018-12-05 21:01:07 +00:00
..
AArch64 AArch64: support funclets in fastcall and swift_call 2018-12-05 07:09:20 +00:00
AMDGPU AMDGPU: Fix using old address spaces in some tests 2018-12-05 17:34:59 +00:00
ARC
ARM [ARM GlobalISel] Implement call lowering for Thumb2 2018-12-05 10:35:28 +00:00
AVR [AVR] Reorder the CHECK lines in directmem.ll to match current trunk 2018-11-09 23:17:59 +00:00
BPF
Generic Move llc-start-stop-instance to x86 2018-12-04 18:19:08 +00:00
Hexagon [Hexagon] Add instruction definitions for Hexagon V66 2018-12-05 21:01:07 +00:00
Inputs
Lanai
MIR [CodeGen] Fix bugs in BranchFolderPass when debug labels are generated. 2018-11-30 08:07:29 +00:00
MSP430 [MSP430] Optimize srl/sra in case of A >> (8 + N) 2018-11-19 10:43:02 +00:00
Mips [TargetLowering] expandFP_TO_UINT - improve fp16 support 2018-11-19 19:16:13 +00:00
NVPTX [NVPTX] Add lowering of i128 numbers as struct fields 2018-12-01 00:21:52 +00:00
Nios2
PowerPC [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
RISCV [RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new test cases 2018-12-01 05:00:00 +00:00
SPARC Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
SystemZ [SystemZ] make test immune to improvements in undef simplification 2018-11-18 16:50:44 +00:00
Thumb [SelectionDAG] swap select_cc operands to enable folding 2018-11-09 11:09:40 +00:00
Thumb2 [ARM] Enable spilling of the hGPR register class in Thumb2 2018-11-08 13:02:10 +00:00
WebAssembly [WebAssembly] WebAssemblyLowerEmscriptenEHSjLj: use getter/setter for accessing tempRet0 2018-11-20 19:25:07 +00:00
WinCFGuard
WinEH
X86 [X86][SSE] Fix a copy+paste typo that was folding the sext/zext of partial vectors 2018-12-05 19:32:19 +00:00
XCore Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00