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llvm-project/llvm/test/CodeGen/MIR/AMDGPU
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Aditya Nandakumar b14fd2608c [GISel]: Verify COPIES involving generic registers. 
Add verification for copies involving generic registers if they are
compatible - ie if it is a generic copy, then the types are the
same, and if a COPY b/w generic and target virtual register, then
the sizes should be the same. Only checks if there are no sub registers
involved for now.

https://reviews.llvm.org/D37775

llvm-svn: 324696
 		2018-02-09 01:27:23 +00:00
..
expected-target-index-name.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
intrinsics.mir [GISel]: Verify COPIES involving generic registers. 2018-02-09 01:27:23 +00:00
invalid-target-index-operand.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
lit.local.cfg
…
stack-id.mir Add an ID field to StackObjects 2017-07-20 21:03:45 +00:00
syncscopes.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
target-flags.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
target-index-operands.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00