llvm-project/llvm/lib/Target/AMDGPU
Changpeng Fang 5b648df1a8 AMDGPU: Reduce the number of expensive calls in SIFormMemoryClause
Summary:
  RPTracker::reset(MI) is a very expensive call when the number of virtual registers is huge.
We observed a long compilation time issue when RPT::reset() is called once for each cluster.

In this work, we call RPT.reset() only at the first seen cluster, and use advance() to get
the register pressure for the later clusters in the same basic block. This could effectively reduce the number
of the expensive calls and thus reduce the compile time.

Reviewers:
  rampitec

Fixes:
  SWDEV-239161

Differential Revision:
  https://reviews.llvm.org/D95273
2021-01-25 16:08:08 -08:00
..
AsmParser [AMDGPU][MC] Improved errors handling for SDWA operands 2021-01-25 19:02:53 +03:00
Disassembler [llvm] Use static_assert instead of assert (NFC) 2021-01-22 23:25:05 -08:00
MCTargetDesc [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
Utils [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPU.h [AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI inline hook 2021-01-21 20:29:17 -08:00
AMDGPU.td [AMDGPU] Remove deprecated V_MUL_LO_I32 from GFX10 2021-01-05 11:59:57 -05:00
AMDGPUAliasAnalysis.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAliasAnalysis.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAlwaysInlinePass.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
AMDGPUAnnotateKernelFeatures.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUAnnotateUniformValues.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUArgumentUsageInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUArgumentUsageInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAsmPrinter.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUAsmPrinter.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAtomicOptimizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUCallLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUCallLowering.h AMDGPU/GlobalISel: Enable sret demotion 2021-01-08 10:56:35 +05:30
AMDGPUCallingConv.td AMDGPU: Remove redundant CCAction for i1 2020-12-15 17:00:27 -05:00
AMDGPUCodeGenPrepare.cpp AMDGPU: Use more accurate fast f64 fdiv 2021-01-21 10:51:36 -05:00
AMDGPUCombine.td AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner 2020-11-03 09:24:50 +01:00
AMDGPUExportClustering.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUExportClustering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGISel.td [AMDGPU][GlobalISel] GlobalISel for flat scratch 2020-12-22 16:33:06 -08:00
AMDGPUGenRegisterBankInfo.def
AMDGPUGlobalISelUtils.cpp [AMDGPU] Remove an unused return value. NFC. 2020-11-10 09:15:14 +00:00
AMDGPUGlobalISelUtils.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUHSAMetadataStreamer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUHSAMetadataStreamer.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUISelDAGToDAG.cpp [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses. 2021-01-22 14:20:59 +05:30
AMDGPUISelLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUISelLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstCombineIntrinsic.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUInstrInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.td
AMDGPUInstructionSelector.cpp [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses. 2021-01-22 14:20:59 +05:30
AMDGPUInstructionSelector.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstructions.td [TableGen] Add the !filter bang operator. 2020-11-09 10:56:55 -05:00
AMDGPULateCodeGenPrepare.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPULegalizerInfo.cpp AMDGPU: Use more accurate fast f64 fdiv 2021-01-21 10:51:36 -05:00
AMDGPULegalizerInfo.h AMDGPU: Use more accurate fast f64 fdiv 2021-01-21 10:51:36 -05:00
AMDGPULibCalls.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULibFunc.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPULibFunc.h
AMDGPULowerIntrinsics.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULowerKernelArguments.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULowerKernelAttributes.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMCInstLower.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMIRFormatter.cpp [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
AMDGPUMIRFormatter.h [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
AMDGPUMachineCFGStructurizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMachineFunction.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineFunction.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMacroFusion.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMacroFusion.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPTNote.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPostLegalizerCombiner.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUPreLegalizerCombiner.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPrintfRuntimeBinding.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPromoteAlloca.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUPropagateAttributes.cpp Revert "[IndirectFunctions] Skip propagating attributes to address taken functions" 2021-01-25 15:58:06 -05:00
AMDGPURegBankCombiner.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPURegisterBankInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPURegisterBankInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPURegisterBanks.td
AMDGPURewriteOutArguments.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUSearchableTables.td
AMDGPUSubtarget.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUSubtarget.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUTargetMachine.cpp [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0 2021-01-22 12:29:39 -08:00
AMDGPUTargetMachine.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUTargetObjectFile.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp [AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI inline hook 2021-01-21 20:29:17 -08:00
AMDGPUTargetTransformInfo.h [AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI inline hook 2021-01-21 20:29:17 -08:00
AMDGPUUnifyDivergentExitNodes.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUUnifyMetadata.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDILCFGStructurizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDKernelCodeT.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
BUFInstructions.td [AMDGPU] Add default 1 glc operand to rtn atomics 2020-11-05 10:41:59 -08:00
CMakeLists.txt [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
CaymanInstructions.td
DSInstructions.td [AMDGPU] Resolve issues when picking between ds_read/write and ds_read2/write2 2020-12-10 12:40:49 +01:00
EXPInstructions.td [AMDGPU] Separate out real exp instructions by subtarget. NFC. 2020-11-11 17:13:40 +00:00
EvergreenInstructions.td [AMDGPU] Omit needless string concatenations. NFC. 2020-10-28 12:56:52 +00:00
FLATInstructions.td [AMDGPU] Allow no saddr for global addtid insts 2020-12-16 10:01:40 +01:00
GCNDPPCombine.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNHazardRecognizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNHazardRecognizer.h [AMDGPU] Add Reset function to GCNHazardRecognizer 2020-10-28 16:32:32 -07:00
GCNILPSched.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNIterativeScheduler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNIterativeScheduler.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNMinRegStrategy.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNNSAReassign.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNProcessors.td [AMDGPU] Add gfx1033 target 2020-11-03 16:27:48 +00:00
GCNRegBankReassign.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNRegPressure.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNRegPressure.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNSchedStrategy.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNSchedStrategy.h
GCNSubtarget.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
InstCombineTables.td
MIMGInstructions.td [AMDGPU][MC] Add tfe disassembler support MIMG opcodes 2021-01-20 10:37:09 +01:00
R600.td
R600AsmPrinter.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600AsmPrinter.h
R600ClauseMergePass.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ControlFlowFinalizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Defines.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600EmitClauseMarkers.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ExpandSpecialInstrs.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600FrameLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600FrameLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600ISelLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ISelLowering.h
R600InstrFormats.td
R600InstrInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600InstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
R600Instructions.td
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600MachineScheduler.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600OpenCLImageTypeLoweringPass.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600OptimizeVectorRegisters.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Packetizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Processors.td
R600RegisterInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600RegisterInfo.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600RegisterInfo.td
R600Schedule.td
R600Subtarget.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R700Instructions.td
SIAddIMGInit.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIAnnotateControlFlow.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIDefines.h [AMDGPU] Simpler names for arch-specific ttmp registers. NFC. 2021-01-19 18:47:14 +00:00
SIFixSGPRCopies.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIFixVGPRCopies.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIFoldOperands.cpp [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses. 2021-01-22 14:20:59 +05:30
SIFormMemoryClauses.cpp AMDGPU: Reduce the number of expensive calls in SIFormMemoryClause 2021-01-25 16:08:08 -08:00
SIFrameLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIFrameLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIISelLowering.cpp [AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization 2021-01-25 08:31:17 +09:00
SIISelLowering.h AMDGPU: Use more accurate fast f64 fdiv 2021-01-21 10:51:36 -05:00
SIInsertHardClauses.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIInsertSkips.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIInsertWaitcnts.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIInstrFormats.td [AMDGPU] Add a TRANS bit to TSFlags. NFC. 2020-11-24 17:49:56 +00:00
SIInstrInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIInstrInfo.h [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
SIInstrInfo.td [AMDGPU] Deduplicate VOP tablegen asm & ins 2021-01-11 13:49:26 -05:00
SIInstructions.td [AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization 2021-01-25 08:31:17 +09:00
SILoadStoreOptimizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SILowerControlFlow.cpp [AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization 2021-01-25 08:31:17 +09:00
SILowerI1Copies.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
SILowerSGPRSpills.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIMachineFunctionInfo.cpp AMDGPU: Add occupancy to serialized MachineFunctionInfo 2021-01-21 09:21:00 -05:00
SIMachineFunctionInfo.h [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
SIMachineScheduler.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIMachineScheduler.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIMemoryLegalizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIModeRegister.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIOptimizeExecMasking.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIOptimizeExecMaskingPreRA.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPeepholeSDWA.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPostRABundler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPreAllocateWWMRegs.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPreEmitPeephole.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIProgramInfo.cpp [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIProgramInfo.h [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIRegisterInfo.cpp [AMDGPU] Fix FP materialization/resolve with flat scratch 2021-01-22 16:06:47 -08:00
SIRegisterInfo.h Change materializeFrameBaseRegister() to return register 2021-01-22 15:51:06 -08:00
SIRegisterInfo.td [AMDGPU] Simpler names for arch-specific ttmp registers. NFC. 2021-01-19 18:47:14 +00:00
SIRemoveShortExecBranches.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SISchedule.td [AMDGPU] Add _e64 suffix to VOP3 Insts 2021-01-12 18:33:18 -05:00
SIShrinkInstructions.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIWholeQuadMode.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SMInstructions.td [AMDGPU] Make use of HasSMemRealTime predicate. NFC. 2020-12-14 16:34:57 +00:00
SOPInstructions.td [AMDGPU] Rename pseudo S_WAITCNT_IDLE to S_WAIT_IDLE. NFC. 2020-11-18 14:03:43 +00:00
VIInstrFormats.td
VOP1Instructions.td [AMDGPU] Add a TRANS bit to TSFlags. NFC. 2020-11-24 17:49:56 +00:00
VOP2Instructions.td [AMDGPU] Add _e64 suffix to VOP3 Insts 2021-01-12 18:33:18 -05:00
VOP3Instructions.td [AMDGPU] Add _e64 suffix to VOP3 Insts 2021-01-12 18:33:18 -05:00
VOP3PInstructions.td [AMDGPU] Add _e64 suffix to VOP3 Insts 2021-01-12 18:33:18 -05:00
VOPCInstructions.td [AMDGPU] Corrected declaration of VOPC instructions with SDWA addressing mode. 2020-11-05 11:15:50 -05:00
VOPInstructions.td [AMDGPU] Add a TRANS bit to TSFlags. NFC. 2020-11-24 17:49:56 +00:00