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AArch64
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Recommit "[AArch64][GlobalISel] Implement widenScalar for signed overflow"
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2021-01-25 16:57:20 -05:00 |
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AMDGPU
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[AMDGPU] Added -mcpu=tahiti to 3 tests. NFC.
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2021-01-25 15:50:59 -08:00 |
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ARC
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…
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ARM
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[ARM] Disable sign extended SSAT pattern recognition.
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2021-01-22 14:07:48 +00:00 |
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AVR
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[AVR] Optimize 8-bit int shift
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2021-01-24 11:04:37 +08:00 |
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BPF
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…
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Generic
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Use unary CreateShuffleVector if possible
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2020-12-30 22:36:08 +09:00 |
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Hexagon
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[NewPM][opt] Run the "default" AA pipeline by default
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2021-01-21 21:08:54 -08:00 |
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Inputs
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…
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Lanai
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…
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MIR
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[AMDGPU] Implement mir parseCustomPseudoSourceValue
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2021-01-22 11:24:08 +01:00 |
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MSP430
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…
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Mips
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[CodeGen] Try to make the print of memory operand alignment a little more user friendly.
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2021-01-11 19:58:47 -08:00 |
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NVPTX
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[NFC] Disallow unused prefixes under llvm/test/CodeGen
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2021-01-11 12:32:18 -08:00 |
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PowerPC
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[PowerPC] Add missing negate for VPERMXOR on little endian subtargets
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2021-01-25 12:23:33 -06:00 |
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RISCV
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[RISCV] Add RVV insertelt/extractelt scalable-vector patterns
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2021-01-25 22:03:52 +00:00 |
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SPARC
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[SPARC] Fix fp128 load/stores
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2021-01-13 14:59:50 -08:00 |
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SystemZ
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[SystemZ] misched-cutoff tests can only be tested on non-NDEBUG (assertion) builds
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2021-01-14 15:46:27 +00:00 |
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Thumb
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[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer
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2021-01-23 09:10:03 +00:00 |
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Thumb2
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[LSR] Drop potentially invalid nowrap flags when switching to post-inc IV (PR46943)
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2021-01-25 23:13:48 +01:00 |
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VE
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[VE] Update VELIntrinsic tests
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2021-01-13 00:12:50 +09:00 |
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WebAssembly
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[WebAssembly] Prototype new f64x2 conversions
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2021-01-20 11:28:06 -08:00 |
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WinCFGuard
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…
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WinEH
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…
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X86
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[Win64] Ensure all stack frames are 8 byte aligned
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2021-01-25 10:39:27 -08:00 |
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XCore
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[test] Add explicit dso_local to definitions in ELF static relocation model tests
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2020-12-30 15:47:16 -08:00 |
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