llvm-project/llvm/test/CodeGen
Ben Shi 63ca9371c7 [ARM] Implement target hook function to decide folding (mul (add x, c1), c2)
Prevent the folding in DAGCombine if it leads to worse code.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D109124
2021-09-07 15:42:43 +08:00
..
AArch64 [DAGCombine] Prevent the transform of combine for multi-use operand 2021-09-06 15:30:32 -04:00
AMDGPU [DAG] Remove oneuse check in select_cc setgt X, -1, C, ~C fold 2021-09-05 16:18:31 +01:00
ARC [ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions 2021-08-24 11:53:20 -07:00
ARM [ARM] Implement target hook function to decide folding (mul (add x, c1), c2) 2021-09-07 15:42:43 +08:00
AVR [AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors' 2021-08-05 10:37:36 +08:00
BPF [BPF] support btf_tag attribute in .BTF section 2021-08-28 21:02:27 -07:00
Generic Moved the test to X86 as it's x86 specific. 2021-08-31 14:48:29 -04:00
Hexagon [Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs 2021-07-27 18:36:28 -05:00
Inputs
Lanai [Lanai] fix lowering wide returns 2021-08-05 21:08:09 -07:00
M68k [M68k][test] Migrate the remaining fixup and relaxation tests 2021-09-04 16:27:13 -07:00
MIR The maximal representable alignment in LLVM IR is 1GiB, not 512MiB 2021-08-26 12:53:39 +03:00
MSP430
Mips [MipsISelLowering] avoid emitting libcalls to __multi3 2021-09-02 10:41:37 -07:00
NVPTX [NVPTX] Add NVPTX intrinsics for CUDA PTX 6.5 ldmatrix instructions 2021-08-06 16:13:35 -07:00
PowerPC [DAG] Remove oneuse check in select_cc setgt X, -1, C, ~C fold 2021-09-05 16:18:31 +01:00
RISCV [DAG] Fold select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C 2021-09-05 16:04:01 +01:00
SPARC
SystemZ SystemZ: Tidy up a mir test 2021-08-10 13:56:54 -04:00
Thumb [ARM] Implement target hook function to decide folding (mul (add x, c1), c2) 2021-09-07 15:42:43 +08:00
Thumb2 [ARM] Add patterns for store(fptosisat(..)) 2021-09-03 19:22:11 +01:00
VE
WebAssembly [WebAssembly] Support opaque pointers in AddMissingPrototypes 2021-09-04 11:25:42 +02:00
WinCFGuard
WinEH Fix SEH table addresses for Windows 2021-08-20 22:32:12 +03:00
X86 [X86] Handle inverted inputs when matching VPTERNLOG from 2 binary ops. 2021-09-06 17:44:52 -07:00
XCore