llvm-project/llvm/test/Transforms/LoopVectorize/X86
Simon Pilgrim f114ef3731 [CostModel][X86] Add generic costs for vXi32 MUL -> v2Xi16 PMADDDW folds
Based off the improved fold in D108522

This should eventually allow us to replace the SLM only cost patterns with generic versions.
2021-09-05 16:08:11 +01:00
..
already-vectorized.ll
avx1.ll
avx512.ll [LV] Let selectVectorizationFactor reason directly on VectorizationFactor. 2021-04-20 09:54:45 +01:00
consecutive-ptr-cg-bug.ll
consecutive-ptr-uniforms.ll [VPlan] Merge predicated-triangle regions, after sinking. 2021-06-28 11:10:38 +01:00
constant-fold.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
constant-vector-operand.ll
conversion-cost.ll [LoopVectorize][X86] Regenerate conversion-cost.ll tests 2021-07-01 15:34:20 +01:00
cost-model-assert.ll [ScalarEvolution] Ensure backedge-taken counts are not pointers. 2021-06-21 16:24:16 -07:00
cost-model.ll
float-induction-x86.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
fneg-cost.ll [CostModel][X86] Improve fneg costs 2021-05-21 17:23:45 +01:00
fp32_to_uint32-cost-model.ll
fp64_to_uint32-cost-model.ll
fp80-widest-type.ll
fp_to_sint8-cost-model.ll [CostModel][X86] Adjust fptosi/fptoui SSE/AVX legalized costs based on llvm-mca reports. 2021-07-12 20:38:25 +01:00
funclet.ll
gather-cost.ll
gather-vs-interleave.ll
gather_scatter.ll [SLP][COST][X86]Improve cost model for masked gather. 2021-07-08 11:53:30 -07:00
gcc-examples.ll
illegal-parallel-loop-uniform-write.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
imprecise-through-phis.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
int128_no_gather.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
interleave_short_tc.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
interleaved-accesses-large-gap.ll
interleaved-accesses-waw-dependency.ll
interleaving.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
intrinsiccost.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
invariant-load-gather.ll [LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses 2021-07-19 19:38:24 +08:00
invariant-store-vectorization.ll [LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses 2021-07-19 19:38:24 +08:00
libm-vector-calls-VF2-VF8.ll
libm-vector-calls-finite.ll
libm-vector-calls.ll
lit.local.cfg
load-deref-pred.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
masked_load_store.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
max-mstore.ll
metadata-enable.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
min-trip-count-switch.ll
mul_slm_16bit.ll [CostModel][X86] Add generic costs for vXi32 MUL -> v2Xi16 PMADDDW folds 2021-09-05 16:08:11 +01:00
no-vector.ll
no_fpmath.ll [LV] Consider Loop Unroll Hints When Making Interleave Decisions 2021-04-28 17:27:52 -04:00
no_fpmath_with_hotness.ll
nontemporal.ll
optsize.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
outer_loop_test1_no_explicit_vect_width.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
parallel-loops-after-reg2mem.ll
parallel-loops.ll
powof2div.ll
pr23997.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr34438.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr35432.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr36524.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr39160.ll
pr42674.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr48340.ll Support intrinsic overloading on unnamed types 2021-03-19 14:34:25 +01:00
propagate-metadata.ll
ptr-indvar-crash.ll
rauw-bug.ll
reduction-crash.ll
reduction-fastmath.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
reduction-small-size.ll
redundant-vf2-cost.ll
reg-usage-debug.ll
reg-usage.ll
register-assumption.ll
runtime-limit.ll Recommit "[LV] Move runtime pointer size check to LVP::plan()." 2021-03-29 16:14:27 +01:00
scatter_crash.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
slm-no-vectorize.ll
small-size.ll [VPlan] Merge predicated-triangle regions, after sinking. 2021-06-28 11:10:38 +01:00
strided_load_cost.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
struct-store.ll
svml-calls-finite.ll
svml-calls.ll
tail_folding_and_assume_safety.ll [LV] Parallel annotated loop does not imply all loads can be hoisted. 2021-06-10 23:37:57 +02:00
tail_loop_folding.ll
tripcount.ll
uint64_to_fp64-cost-model.ll [CostModel][X86] Adjust uitofp(vXi64) SSE/AVX legalized costs based on llvm-mca reports. 2021-07-02 13:09:00 +01:00
uniform-phi.ll
uniform_load.ll
uniform_mem_op.ll [LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses 2021-07-19 19:38:24 +08:00
uniformshift.ll
unroll-pm.ll
unroll-small-loops.ll
unroll_selection.ll
veclib-calls.ll
vect.omp.force.ll
vect.omp.force.small-tc.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
vector-scalar-select-cost.ll
vector_max_bandwidth.ll
vector_ptr_load_store.ll
vectorization-remarks-loopid-dbg.ll
vectorization-remarks-missed.ll
vectorization-remarks-profitable.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
vectorization-remarks.ll
vectorize-only-for-real.ll
x86-interleaved-accesses-masked-group.ll Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069) 2021-08-23 21:09:26 +01:00
x86-interleaved-store-accesses-with-gaps.ll Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069) 2021-08-23 21:09:26 +01:00
x86-pr39099.ll [VPlan] Merge predicated-triangle regions, after sinking. 2021-06-28 11:10:38 +01:00
x86-predication.ll [VPlan] Merge predicated-triangle regions, after sinking. 2021-06-28 11:10:38 +01:00
x86_fp80-interleaved-access.ll
x86_fp80-vector-store.ll