ShihPo Hung 11072a0bdb [RISCV][Clang] Add RVV AMO builtins ... Add vamo[swap/add/xor/and/or/min/max/minu/maxu] builtins. Reviewed By: khchen Differential Revision: https://reviews.llvm.org/D100448		2021-04-21 01:48:02 -07:00
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rvb-intrinsics	[RISCV] Prevent __builtin_riscv_orc_b_64 from being compiled RV32 target.	2021-04-08 11:34:56 -07:00
rvv-intrinsics	[RISCV][Clang] Add RVV AMO builtins	2021-04-21 01:48:02 -07:00
rvv-intrinsics-overloaded	[RISCV][Clang] Add RVV AMO builtins	2021-04-21 01:48:02 -07:00
riscv-atomics.c	NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg.	2021-02-11 17:35:09 -05:00
riscv-inline-asm-rvv.c	[RISCV] Add inline asm constraint 'vr' and 'vm' in Clang for RISC-V 'V'.	2021-03-30 09:47:27 +08:00
riscv-inline-asm.c	…
riscv-metadata.c	…
riscv-sdata-module-flag.c	…
riscv-v-debuginfo.c	[Clang][RISCV] Define RISC-V V builtin types	2021-02-18 10:17:31 +08:00
riscv32-ilp32-abi.c	…
riscv32-ilp32-ilp32f-abi.c	…
riscv32-ilp32-ilp32f-ilp32d-abi.c	…
riscv32-ilp32d-abi.c	…
riscv32-ilp32f-abi.c	…
riscv32-ilp32f-ilp32d-abi.c	…
riscv64-lp64-abi.c	…
riscv64-lp64-lp64f-abi.c	…
riscv64-lp64-lp64f-lp64d-abi.c	…
riscv64-lp64d-abi.c	…
riscv64-lp64f-lp64d-abi.c	…