16af973933
This change introduces support for zero flag ELF section groups to LLVM. LLVM already supports COMDAT sections, which in ELF are a special type of ELF section groups. These are generally useful to enable linker GC where you want a group of sections to always travel together, that is to be either retained or discarded as a whole, but without the COMDAT semantics. Other ELF assemblers already support zero flag ELF section groups and this change helps us reach feature parity. Differential Revision: https://reviews.llvm.org/D95851 |
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| .. | ||
| Disassembler | ||
| MCTargetDesc | ||
| TargetInfo | ||
| CMakeLists.txt | ||
| README.txt | ||
| XCore.h | ||
| XCore.td | ||
| XCoreAsmPrinter.cpp | ||
| XCoreCallingConv.td | ||
| XCoreFrameLowering.cpp | ||
| XCoreFrameLowering.h | ||
| XCoreFrameToArgsOffsetElim.cpp | ||
| XCoreISelDAGToDAG.cpp | ||
| XCoreISelLowering.cpp | ||
| XCoreISelLowering.h | ||
| XCoreInstrFormats.td | ||
| XCoreInstrInfo.cpp | ||
| XCoreInstrInfo.h | ||
| XCoreInstrInfo.td | ||
| XCoreLowerThreadLocal.cpp | ||
| XCoreMCInstLower.cpp | ||
| XCoreMCInstLower.h | ||
| XCoreMachineFunctionInfo.cpp | ||
| XCoreMachineFunctionInfo.h | ||
| XCoreRegisterInfo.cpp | ||
| XCoreRegisterInfo.h | ||
| XCoreRegisterInfo.td | ||
| XCoreSelectionDAGInfo.cpp | ||
| XCoreSelectionDAGInfo.h | ||
| XCoreSubtarget.cpp | ||
| XCoreSubtarget.h | ||
| XCoreTargetMachine.cpp | ||
| XCoreTargetMachine.h | ||
| XCoreTargetObjectFile.cpp | ||
| XCoreTargetObjectFile.h | ||
| XCoreTargetStreamer.h | ||
| XCoreTargetTransformInfo.h | ||
README.txt
To-do ----- * Instruction encodings * Tailcalls * Investigate loop alignment * Add builtins