110 lines
2.7 KiB
ArmAsm
110 lines
2.7 KiB
ArmAsm
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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#include "../assembly.h"
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// float __floatundisf(du_int a);
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// Note that there is a hardware instruction, fildll, that does most of what
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// this function needs to do. However, because of our ia32 ABI, it will take
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// a write-small read-large stall, so the software implementation here is
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// actually several cycles faster.
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// This is a branch-free implementation. A branchy implementation might be
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// faster for the common case if you know something a priori about the input
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// distribution.
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/* branch-free x87 implementation - one cycle slower than without x87.
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#ifdef __i386__
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CONST_SECTION
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.balign 3
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.quad 0x43f0000000000000
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twop64: .quad 0x0000000000000000
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#define TWOp64 twop64-0b(%ecx,%eax,8)
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.text
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.balign 4
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DEFINE_COMPILERRT_FUNCTION(__floatundisf)
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movl 8(%esp), %eax
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movd 8(%esp), %xmm1
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movd 4(%esp), %xmm0
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punpckldq %xmm1, %xmm0
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calll 0f
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0: popl %ecx
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sarl $31, %eax
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movq %xmm0, 4(%esp)
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fildll 4(%esp)
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faddl TWOp64
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fstps 4(%esp)
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flds 4(%esp)
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ret
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END_COMPILERRT_FUNCTION(__floatundisf)
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#endif // __i386__
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*/
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// branch-free, x87-free implementation - faster at the expense of code size
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#ifdef __i386__
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CONST_SECTION
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.balign 16
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twop52:
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.quad 0x4330000000000000
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.quad 0x0000000000000fff
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.balign 16
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sticky:
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.quad 0x0000000000000000
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.long 0x00000012
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.balign 16
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twelve:
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.long 0x00000000
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#define TWOp52 twop52-0b(%ecx)
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#define STICKY sticky-0b(%ecx,%eax,8)
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.text
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.balign 4
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DEFINE_COMPILERRT_FUNCTION(__floatundisf)
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movl 8(%esp), %eax
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movd 8(%esp), %xmm1
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movd 4(%esp), %xmm0
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punpckldq %xmm1, %xmm0
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calll 0f
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0: popl %ecx
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shrl %eax // high 31 bits of input as sint32
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addl $0x7ff80000, %eax
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sarl $31, %eax // (big input) ? -1 : 0
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movsd STICKY, %xmm1 // (big input) ? 0xfff : 0
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movl $12, %edx
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andl %eax, %edx // (big input) ? 12 : 0
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movd %edx, %xmm3
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andpd %xmm0, %xmm1 // (big input) ? input & 0xfff : 0
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movsd TWOp52, %xmm2 // 0x1.0p52
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psrlq %xmm3, %xmm0 // (big input) ? input >> 12 : input
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orpd %xmm2, %xmm1 // 0x1.0p52 + ((big input) ? input & 0xfff : input)
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orpd %xmm1, %xmm0 // 0x1.0p52 + ((big input) ? (input >> 12 | input & 0xfff) : input)
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subsd %xmm2, %xmm0 // (double)((big input) ? (input >> 12 | input & 0xfff) : input)
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cvtsd2ss %xmm0, %xmm0 // (float)((big input) ? (input >> 12 | input & 0xfff) : input)
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pslld $23, %xmm3
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paddd %xmm3, %xmm0 // (float)input
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movd %xmm0, 4(%esp)
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flds 4(%esp)
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ret
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END_COMPILERRT_FUNCTION(__floatundisf)
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#endif // __i386__
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NO_EXEC_STACK_DIRECTIVE
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