234 lines
7.3 KiB
LLVM
234 lines
7.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
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define i16 @lshr_15(i16 %x) {
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; CHECK-LABEL: @lshr_15(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i16 [[X:%.*]], 15
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; CHECK-NEXT: ret i16 [[LSHR]]
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;
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%zext = zext i16 %x to i32
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%lshr = lshr i32 %zext, 15
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%trunc = trunc i32 %lshr to i16
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ret i16 %trunc
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}
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; Negative test
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define i16 @lshr_16(i16 %x) {
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; CHECK-LABEL: @lshr_16(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[ZEXT]], 16
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[LSHR]] to i16
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; CHECK-NEXT: ret i16 [[TRUNC]]
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;
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%zext = zext i16 %x to i32
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%lshr = lshr i32 %zext, 16
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%trunc = trunc i32 %lshr to i16
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ret i16 %trunc
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}
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; Negative test
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define i16 @lshr_var_shift_amount(i8 %x, i8 %amt) {
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; CHECK-LABEL: @lshr_var_shift_amount(
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; CHECK-NEXT: [[Z:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[ZA:%.*]] = zext i8 [[AMT:%.*]] to i32
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; CHECK-NEXT: [[S:%.*]] = lshr i32 [[Z]], [[ZA]]
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; CHECK-NEXT: [[A:%.*]] = add i32 [[S]], [[Z]]
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; CHECK-NEXT: [[S2:%.*]] = lshr i32 [[A]], 2
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; CHECK-NEXT: [[T:%.*]] = trunc i32 [[S2]] to i16
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; CHECK-NEXT: ret i16 [[T]]
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;
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%z = zext i8 %x to i32
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%za = zext i8 %amt to i32
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%s = lshr i32 %z, %za
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%a = add i32 %s, %z
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%s2 = lshr i32 %a, 2
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%t = trunc i32 %s2 to i16
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ret i16 %t
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}
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define i16 @lshr_var_bounded_shift_amount(i8 %x, i8 %amt) {
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; CHECK-LABEL: @lshr_var_bounded_shift_amount(
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; CHECK-NEXT: [[Z:%.*]] = zext i8 [[X:%.*]] to i16
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; CHECK-NEXT: [[ZA:%.*]] = zext i8 [[AMT:%.*]] to i16
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; CHECK-NEXT: [[ZA2:%.*]] = and i16 [[ZA]], 15
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; CHECK-NEXT: [[S:%.*]] = lshr i16 [[Z]], [[ZA2]]
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; CHECK-NEXT: [[A:%.*]] = add i16 [[S]], [[Z]]
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; CHECK-NEXT: [[S2:%.*]] = lshr i16 [[A]], 2
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; CHECK-NEXT: ret i16 [[S2]]
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;
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%z = zext i8 %x to i32
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%za = zext i8 %amt to i32
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%za2 = and i32 %za, 15
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%s = lshr i32 %z, %za2
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%a = add i32 %s, %z
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%s2 = lshr i32 %a, 2
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%t = trunc i32 %s2 to i16
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ret i16 %t
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}
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; Negative test
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define i32 @lshr_check_no_overflow(i32 %x, i16 %amt) {
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; CHECK-LABEL: @lshr_check_no_overflow(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[SEXT:%.*]] = sext i16 [[AMT:%.*]] to i64
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[SEXT]], 4294967295
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; CHECK-NEXT: [[SHL:%.*]] = lshr i64 [[ZEXT]], [[AND]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[SHL]] to i32
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; CHECK-NEXT: ret i32 [[TRUNC]]
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;
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%zext = zext i32 %x to i64
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%sext = sext i16 %amt to i64
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%and = and i64 %sext, 4294967295
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%shl = lshr i64 %zext, %and
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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define void @lshr_big_dag(i16* %a, i8 %b, i8 %c) {
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; CHECK-LABEL: @lshr_big_dag(
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; CHECK-NEXT: [[ZEXT1:%.*]] = zext i8 [[B:%.*]] to i16
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; CHECK-NEXT: [[ZEXT2:%.*]] = zext i8 [[C:%.*]] to i16
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; CHECK-NEXT: [[ADD1:%.*]] = add i16 [[ZEXT1]], [[ZEXT2]]
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; CHECK-NEXT: [[SFT1:%.*]] = and i16 [[ADD1]], 15
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; CHECK-NEXT: [[SHR1:%.*]] = lshr i16 [[ADD1]], [[SFT1]]
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; CHECK-NEXT: [[ADD2:%.*]] = add i16 [[ADD1]], [[SHR1]]
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; CHECK-NEXT: [[SFT2:%.*]] = and i16 [[ADD2]], 7
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; CHECK-NEXT: [[SHR2:%.*]] = lshr i16 [[ADD2]], [[SFT2]]
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; CHECK-NEXT: store i16 [[SHR2]], i16* [[A:%.*]], align 2
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; CHECK-NEXT: ret void
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;
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%zext1 = zext i8 %b to i32
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%zext2 = zext i8 %c to i32
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%add1 = add i32 %zext1, %zext2
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%sft1 = and i32 %add1, 15
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%shr1 = lshr i32 %add1, %sft1
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%add2 = add i32 %add1, %shr1
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%sft2 = and i32 %add2, 7
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%shr2 = lshr i32 %add2, %sft2
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%trunc = trunc i32 %shr2 to i16
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store i16 %trunc, i16* %a, align 2
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ret void
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}
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; Negative test
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define i8 @lshr_check_not_i8_trunc(i16 %x) {
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; CHECK-LABEL: @lshr_check_not_i8_trunc(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i16 [[X:%.*]], 1
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; CHECK-NEXT: [[ZEXT2:%.*]] = zext i16 [[LSHR]] to i32
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; CHECK-NEXT: [[LSHR2:%.*]] = lshr i32 [[ZEXT2]], 2
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[LSHR2]] to i8
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; CHECK-NEXT: ret i8 [[TRUNC]]
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;
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%lshr = lshr i16 %x, 1
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%zext2 = zext i16 %lshr to i32
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%lshr2 = lshr i32 %zext2, 2
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%trunc = trunc i32 %lshr2 to i8
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ret i8 %trunc
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}
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define <2 x i16> @lshr_vector(<2 x i8> %x) {
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; CHECK-LABEL: @lshr_vector(
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; CHECK-NEXT: [[Z:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i16>
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; CHECK-NEXT: [[ZA:%.*]] = and <2 x i16> [[Z]], <i16 7, i16 8>
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; CHECK-NEXT: [[S:%.*]] = lshr <2 x i16> [[Z]], [[ZA]]
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; CHECK-NEXT: [[A:%.*]] = add <2 x i16> [[S]], [[Z]]
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; CHECK-NEXT: [[S2:%.*]] = lshr <2 x i16> [[A]], <i16 4, i16 5>
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; CHECK-NEXT: ret <2 x i16> [[S2]]
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;
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%z = zext <2 x i8> %x to <2 x i32>
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%za = and <2 x i32> %z, <i32 7, i32 8>
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%s = lshr <2 x i32> %z, %za
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%a = add <2 x i32> %s, %z
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%s2 = lshr <2 x i32> %a, <i32 4, i32 5>
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%t = trunc <2 x i32> %s2 to <2 x i16>
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ret <2 x i16> %t
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}
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; Negative test - can only fold to <2 x i16>, requiring new vector type
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define <2 x i8> @lshr_vector_no_new_vector_type(<2 x i8> %x) {
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; CHECK-LABEL: @lshr_vector_no_new_vector_type(
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; CHECK-NEXT: [[Z:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[ZA:%.*]] = and <2 x i32> [[Z]], <i32 7, i32 8>
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; CHECK-NEXT: [[S:%.*]] = lshr <2 x i32> [[Z]], [[ZA]]
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; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[S]], [[Z]]
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; CHECK-NEXT: [[S2:%.*]] = lshr <2 x i32> [[A]], <i32 4, i32 5>
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; CHECK-NEXT: [[T:%.*]] = trunc <2 x i32> [[S2]] to <2 x i8>
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; CHECK-NEXT: ret <2 x i8> [[T]]
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;
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%z = zext <2 x i8> %x to <2 x i32>
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%za = and <2 x i32> %z, <i32 7, i32 8>
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%s = lshr <2 x i32> %z, %za
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%a = add <2 x i32> %s, %z
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%s2 = lshr <2 x i32> %a, <i32 4, i32 5>
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%t = trunc <2 x i32> %s2 to <2 x i8>
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ret <2 x i8> %t
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}
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; Negative test
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define <2 x i16> @lshr_vector_large_shift_amount(<2 x i8> %x) {
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; CHECK-LABEL: @lshr_vector_large_shift_amount(
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; CHECK-NEXT: [[Z:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[ZA:%.*]] = and <2 x i32> [[Z]], <i32 7, i32 8>
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; CHECK-NEXT: [[S:%.*]] = lshr <2 x i32> [[Z]], [[ZA]]
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; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[S]], [[Z]]
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; CHECK-NEXT: [[S2:%.*]] = lshr <2 x i32> [[A]], <i32 16, i32 5>
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; CHECK-NEXT: [[T:%.*]] = trunc <2 x i32> [[S2]] to <2 x i16>
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; CHECK-NEXT: ret <2 x i16> [[T]]
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;
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%z = zext <2 x i8> %x to <2 x i32>
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%za = and <2 x i32> %z, <i32 7, i32 8>
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%s = lshr <2 x i32> %z, %za
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%a = add <2 x i32> %s, %z
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%s2 = lshr <2 x i32> %a, <i32 16, i32 5>
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%t = trunc <2 x i32> %s2 to <2 x i16>
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ret <2 x i16> %t
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}
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define i16 @lshr_exact(i16 %x) {
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; CHECK-LABEL: @lshr_exact(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr exact i16 [[X:%.*]], 15
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; CHECK-NEXT: ret i16 [[LSHR]]
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;
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%zext = zext i16 %x to i32
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%lshr = lshr exact i32 %zext, 15
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%trunc = trunc i32 %lshr to i16
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ret i16 %trunc
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}
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; Negative test
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define i16 @lshr_negative_operand(i16 %x) {
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; CHECK-LABEL: @lshr_negative_operand(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[XOR:%.*]] = xor i32 -1, [[ZEXT]]
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; CHECK-NEXT: [[LSHR2:%.*]] = lshr i32 [[XOR]], 2
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[LSHR2]] to i16
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; CHECK-NEXT: ret i16 [[TRUNC]]
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;
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%zext = zext i16 %x to i32
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%xor = xor i32 -1, %zext
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%lshr2 = lshr i32 %xor, 2
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%trunc = trunc i32 %lshr2 to i16
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ret i16 %trunc
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}
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; We may encounter unoptimized IR as below,
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; so don't crash by assuming that we can
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; apply instruction flags (exact) if there
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; is no instruction.
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define i8 @non_canonical_crash() {
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; CHECK-LABEL: @non_canonical_crash(
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; CHECK-NEXT: ret i8 8
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;
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%sh = lshr i32 33, 2
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%tr = trunc i32 %sh to i8
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ret i8 %tr
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}
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