487 lines
15 KiB
LLVM
487 lines
15 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Instcombine should recognize that this code can be adjusted to fit the canonical max/min pattern.
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; No change
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define i32 @smax1(i32 %n) {
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; CHECK-LABEL: @smax1(
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; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp sgt i32 %n, 0
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; No change
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define i32 @smin1(i32 %n) {
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; CHECK-LABEL: @smin1(
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; CHECK-NEXT: [[T:%.*]] = icmp slt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp slt i32 %n, 0
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define i32 @smax2(i32 %n) {
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; CHECK-LABEL: @smax2(
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; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp sge i32 %n, 1
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define i32 @smin2(i32 %n) {
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; CHECK-LABEL: @smin2(
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; CHECK-NEXT: [[T:%.*]] = icmp slt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp sle i32 %n, -1
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define i32 @smax3(i32 %n) {
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; CHECK-LABEL: @smax3(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp sgt i32 %n, -1
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @smax3_vec(<2 x i32> %n) {
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; CHECK-LABEL: @smax3_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[N:%.*]], zeroinitializer
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp sgt <2 x i32> %n, <i32 -1, i32 -1>
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @smin3(i32 %n) {
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; CHECK-LABEL: @smin3(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp slt i32 %n, 1
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @smin3_vec(<2 x i32> %n) {
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; CHECK-LABEL: @smin3_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[N:%.*]], zeroinitializer
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp slt <2 x i32> %n, <i32 1, i32 1>
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @umax3(i32 %n) {
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; CHECK-LABEL: @umax3(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[N:%.*]], 5
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 5
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp ugt i32 %n, 4
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%m = select i1 %t, i32 %n, i32 5
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @umax3_vec(<2 x i32> %n) {
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; CHECK-LABEL: @umax3_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[N:%.*]], <i32 5, i32 5>
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 5, i32 5>
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp ugt <2 x i32> %n, <i32 4, i32 4>
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 5, i32 5>
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @umin3(i32 %n) {
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; CHECK-LABEL: @umin3(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[N:%.*]], 6
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 6
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp ult i32 %n, 7
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%m = select i1 %t, i32 %n, i32 6
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @umin3_vec(<2 x i32> %n) {
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; CHECK-LABEL: @umin3_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[N:%.*]], <i32 6, i32 6>
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 6, i32 6>
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp ult <2 x i32> %n, <i32 7, i32 7>
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 6, i32 6>
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @smax4(i32 %n) {
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; CHECK-LABEL: @smax4(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp sge i32 %n, 0
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @smax4_vec(<2 x i32> %n) {
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; CHECK-LABEL: @smax4_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[N:%.*]], zeroinitializer
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp sge <2 x i32> %n, zeroinitializer
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @smin4(i32 %n) {
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; CHECK-LABEL: @smin4(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp sle i32 %n, 0
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%m = select i1 %t, i32 %n, i32 0
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @smin4_vec(<2 x i32> %n) {
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; CHECK-LABEL: @smin4_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[N:%.*]], zeroinitializer
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp sle <2 x i32> %n, zeroinitializer
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @umax4(i32 %n) {
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; CHECK-LABEL: @umax4(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[N:%.*]], 8
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 8
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp uge i32 %n, 8
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%m = select i1 %t, i32 %n, i32 8
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @umax4_vec(<2 x i32> %n) {
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; CHECK-LABEL: @umax4_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[N:%.*]], <i32 8, i32 8>
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 8, i32 8>
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp uge <2 x i32> %n, <i32 8, i32 8>
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 8, i32 8>
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ret <2 x i32> %m
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}
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; Canonicalize min/max.
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define i32 @umin4(i32 %n) {
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; CHECK-LABEL: @umin4(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[N:%.*]], 9
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; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 9
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; CHECK-NEXT: ret i32 [[M]]
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;
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%t = icmp ule i32 %n, 9
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%m = select i1 %t, i32 %n, i32 9
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ret i32 %m
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}
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; Canonicalize min/max.
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define <2 x i32> @umin4_vec(<2 x i32> %n) {
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; CHECK-LABEL: @umin4_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[N:%.*]], <i32 9, i32 9>
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; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 9, i32 9>
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; CHECK-NEXT: ret <2 x i32> [[M]]
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;
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%t = icmp ule <2 x i32> %n, <i32 9, i32 9>
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%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 9, i32 9>
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ret <2 x i32> %m
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}
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define i64 @smax_sext(i32 %a) {
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; CHECK-LABEL: @smax_sext(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A_EXT]], 0
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; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0
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; CHECK-NEXT: ret i64 [[MAX]]
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;
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%a_ext = sext i32 %a to i64
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%cmp = icmp sgt i32 %a, -1
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%max = select i1 %cmp, i64 %a_ext, i64 0
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ret i64 %max
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}
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define <2 x i64> @smax_sext_vec(<2 x i32> %a) {
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; CHECK-LABEL: @smax_sext_vec(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i64> [[A_EXT]], zeroinitializer
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; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> zeroinitializer
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; CHECK-NEXT: ret <2 x i64> [[MAX]]
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;
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%a_ext = sext <2 x i32> %a to <2 x i64>
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%cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
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%max = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> zeroinitializer
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ret <2 x i64> %max
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}
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define i64 @smin_sext(i32 %a) {
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; CHECK-LABEL: @smin_sext(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[A_EXT]], 0
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; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0
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; CHECK-NEXT: ret i64 [[MIN]]
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;
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%a_ext = sext i32 %a to i64
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%cmp = icmp slt i32 %a, 1
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%min = select i1 %cmp, i64 %a_ext, i64 0
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ret i64 %min
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}
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define <2 x i64>@smin_sext_vec(<2 x i32> %a) {
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; CHECK-LABEL: @smin_sext_vec(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i64> [[A_EXT]], zeroinitializer
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; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> zeroinitializer
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; CHECK-NEXT: ret <2 x i64> [[MIN]]
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;
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%a_ext = sext <2 x i32> %a to <2 x i64>
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%cmp = icmp slt <2 x i32> %a, <i32 1, i32 1>
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%min = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> zeroinitializer
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ret <2 x i64> %min
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}
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define i64 @umax_sext(i32 %a) {
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; CHECK-LABEL: @umax_sext(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[A_EXT]], 3
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; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 3
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; CHECK-NEXT: ret i64 [[MAX]]
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;
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%a_ext = sext i32 %a to i64
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%cmp = icmp ugt i32 %a, 2
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%max = select i1 %cmp, i64 %a_ext, i64 3
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ret i64 %max
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}
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define <2 x i64> @umax_sext_vec(<2 x i32> %a) {
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; CHECK-LABEL: @umax_sext_vec(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 3, i64 3>
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; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
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; CHECK-NEXT: ret <2 x i64> [[MAX]]
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;
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%a_ext = sext <2 x i32> %a to <2 x i64>
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%cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
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%max = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 3, i64 3>
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ret <2 x i64> %max
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}
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define i64 @umin_sext(i32 %a) {
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; CHECK-LABEL: @umin_sext(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[A_EXT]], 2
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; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 2
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; CHECK-NEXT: ret i64 [[MIN]]
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;
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%a_ext = sext i32 %a to i64
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%cmp = icmp ult i32 %a, 3
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%min = select i1 %cmp, i64 %a_ext, i64 2
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ret i64 %min
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}
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define <2 x i64> @umin_sext_vec(<2 x i32> %a) {
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; CHECK-LABEL: @umin_sext_vec(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 2, i64 2>
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; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
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; CHECK-NEXT: ret <2 x i64> [[MIN]]
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;
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%a_ext = sext <2 x i32> %a to <2 x i64>
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%cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
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%min = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 2, i64 2>
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ret <2 x i64> %min
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}
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define i64 @umax_sext2(i32 %a) {
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; CHECK-LABEL: @umax_sext2(
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; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
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; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 2
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; CHECK-NEXT: ret i64 [[MIN]]
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;
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%a_ext = sext i32 %a to i64
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%cmp = icmp ult i32 %a, 3
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%min = select i1 %cmp, i64 2, i64 %a_ext
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ret i64 %min
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}
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define <2 x i64> @umax_sext2_vec(<2 x i32> %a) {
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; CHECK-LABEL: @umax_sext2_vec(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 2, i64 2>
|
|
; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
|
|
; CHECK-NEXT: ret <2 x i64> [[MIN]]
|
|
;
|
|
%a_ext = sext <2 x i32> %a to <2 x i64>
|
|
%cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
|
|
%min = select <2 x i1> %cmp, <2 x i64> <i64 2, i64 2>, <2 x i64> %a_ext
|
|
ret <2 x i64> %min
|
|
}
|
|
|
|
define i64 @umin_sext2(i32 %a) {
|
|
; CHECK-LABEL: @umin_sext2(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 3
|
|
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 3
|
|
; CHECK-NEXT: ret i64 [[MIN]]
|
|
;
|
|
%a_ext = sext i32 %a to i64
|
|
%cmp = icmp ugt i32 %a, 2
|
|
%min = select i1 %cmp, i64 3, i64 %a_ext
|
|
ret i64 %min
|
|
}
|
|
|
|
define <2 x i64> @umin_sext2_vec(<2 x i32> %a) {
|
|
; CHECK-LABEL: @umin_sext2_vec(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 3, i64 3>
|
|
; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
|
|
; CHECK-NEXT: ret <2 x i64> [[MIN]]
|
|
;
|
|
%a_ext = sext <2 x i32> %a to <2 x i64>
|
|
%cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
|
|
%min = select <2 x i1> %cmp, <2 x i64> <i64 3, i64 3>, <2 x i64> %a_ext
|
|
ret <2 x i64> %min
|
|
}
|
|
|
|
define i64 @umax_zext(i32 %a) {
|
|
; CHECK-LABEL: @umax_zext(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 [[A:%.*]] to i64
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[A_EXT]], 3
|
|
; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 3
|
|
; CHECK-NEXT: ret i64 [[MAX]]
|
|
;
|
|
%a_ext = zext i32 %a to i64
|
|
%cmp = icmp ugt i32 %a, 2
|
|
%max = select i1 %cmp, i64 %a_ext, i64 3
|
|
ret i64 %max
|
|
}
|
|
|
|
define <2 x i64> @umax_zext_vec(<2 x i32> %a) {
|
|
; CHECK-LABEL: @umax_zext_vec(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = zext <2 x i32> [[A:%.*]] to <2 x i64>
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 3, i64 3>
|
|
; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
|
|
; CHECK-NEXT: ret <2 x i64> [[MAX]]
|
|
;
|
|
%a_ext = zext <2 x i32> %a to <2 x i64>
|
|
%cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
|
|
%max = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 3, i64 3>
|
|
ret <2 x i64> %max
|
|
}
|
|
|
|
define i64 @umin_zext(i32 %a) {
|
|
; CHECK-LABEL: @umin_zext(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 [[A:%.*]] to i64
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[A_EXT]], 2
|
|
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 2
|
|
; CHECK-NEXT: ret i64 [[MIN]]
|
|
;
|
|
%a_ext = zext i32 %a to i64
|
|
%cmp = icmp ult i32 %a, 3
|
|
%min = select i1 %cmp, i64 %a_ext, i64 2
|
|
ret i64 %min
|
|
}
|
|
|
|
define <2 x i64> @umin_zext_vec(<2 x i32> %a) {
|
|
; CHECK-LABEL: @umin_zext_vec(
|
|
; CHECK-NEXT: [[A_EXT:%.*]] = zext <2 x i32> [[A:%.*]] to <2 x i64>
|
|
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 2, i64 2>
|
|
; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
|
|
; CHECK-NEXT: ret <2 x i64> [[MIN]]
|
|
;
|
|
%a_ext = zext <2 x i32> %a to <2 x i64>
|
|
%cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
|
|
%min = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 2, i64 2>
|
|
ret <2 x i64> %min
|
|
}
|
|
|
|
; Don't crash mishandling a pattern that can't be transformed.
|
|
|
|
define <2 x i16> @scalar_select_of_vectors(<2 x i16> %a, <2 x i16> %b, i8 %x) {
|
|
; CHECK-LABEL: @scalar_select_of_vectors(
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
|
|
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], <2 x i16> [[A:%.*]], <2 x i16> [[B:%.*]]
|
|
; CHECK-NEXT: ret <2 x i16> [[SEL]]
|
|
;
|
|
%cmp = icmp slt i8 %x, 0
|
|
%sel = select i1 %cmp, <2 x i16> %a, <2 x i16> %b
|
|
ret <2 x i16> %sel
|
|
}
|
|
|