128 lines
4.2 KiB
LLVM
128 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -instcombine-infinite-loop-threshold=2 -S | FileCheck %s
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define i8 @single(i32 %A) {
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; CHECK-LABEL: @single(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[A:%.*]], -128
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; CHECK-NEXT: [[CONV71:%.*]] = select i1 [[TMP0]], i32 [[A]], i32 -128
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[CONV71]] to i8
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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entry:
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%l1 = icmp slt i32 %A, -128
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%l2 = select i1 %l1, i32 128, i32 %A
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%conv7 = trunc i32 %l2 to i8
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ret i8 %conv7
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}
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define i8 @double(i32 %A) {
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; CHECK-LABEL: @double(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[A:%.*]], -128
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; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i32 [[A]], i32 -128
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; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 127
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; CHECK-NEXT: [[CONV71:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 127
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[CONV71]] to i8
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; CHECK-NEXT: ret i8 [[TMP3]]
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;
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entry:
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%l1 = icmp slt i32 %A, -128
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%l2 = select i1 %l1, i32 128, i32 %A
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%.inv = icmp sgt i32 %A, 127
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%spec.select.i = select i1 %.inv, i32 127, i32 %l2
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%conv7 = trunc i32 %spec.select.i to i8
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ret i8 %conv7
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}
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define i8 @thisdoesnotloop(i32 %A, i32 %B) {
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; CHECK-LABEL: @thisdoesnotloop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[L1:%.*]] = icmp slt i32 [[A:%.*]], -128
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; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[B:%.*]] to i8
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; CHECK-NEXT: [[CONV7:%.*]] = select i1 [[L1]], i8 -128, i8 [[TMP0]]
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; CHECK-NEXT: ret i8 [[CONV7]]
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;
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entry:
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%l1 = icmp slt i32 %A, -128
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%l2 = select i1 %l1, i32 128, i32 %B
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%conv7 = trunc i32 %l2 to i8
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ret i8 %conv7
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}
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define i8 @original(i32 %A, i32 %B) {
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; CHECK-LABEL: @original(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -128
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; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -128
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; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 127
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; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 127
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; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[SPEC_SELECT_I]] to i8
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; CHECK-NEXT: ret i8 [[CONV7]]
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;
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%cmp4.i = icmp slt i32 127, %A
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%cmp6.i = icmp sle i32 -128, %A
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%retval.0.i = select i1 %cmp4.i, i32 127, i32 -128
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%not.cmp4.i = xor i1 %cmp4.i, true
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%cleanup.dest.slot.0.i = and i1 %cmp6.i, %not.cmp4.i
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%spec.select.i = select i1 %cleanup.dest.slot.0.i, i32 %A, i32 %retval.0.i
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%conv7 = trunc i32 %spec.select.i to i8
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ret i8 %conv7
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}
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define i8 @original_logical(i32 %A, i32 %B) {
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; CHECK-LABEL: @original_logical(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -128
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; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -128
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; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 127
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; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 127
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; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[SPEC_SELECT_I]] to i8
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; CHECK-NEXT: ret i8 [[CONV7]]
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;
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%cmp4.i = icmp slt i32 127, %A
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%cmp6.i = icmp sle i32 -128, %A
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%retval.0.i = select i1 %cmp4.i, i32 127, i32 -128
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%not.cmp4.i = xor i1 %cmp4.i, true
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%cleanup.dest.slot.0.i = select i1 %cmp6.i, i1 %not.cmp4.i, i1 false
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%spec.select.i = select i1 %cleanup.dest.slot.0.i, i32 %A, i32 %retval.0.i
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%conv7 = trunc i32 %spec.select.i to i8
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ret i8 %conv7
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}
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; This would infinite loop because we have potentially opposing
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; constant transforms on degenerate (unsimplified) cmps.
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define i32 @PR49205(i32 %t0, i1 %b) {
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; CHECK-LABEL: @PR49205(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: br i1 [[B:%.*]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: br label [[FOR_COND]]
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; CHECK: for.end:
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; CHECK-NEXT: ret i32 1
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;
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entry:
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br label %for.cond
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for.cond:
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%s = phi i32 [ 7, %entry ], [ %add, %for.body ]
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br i1 %b, label %for.body, label %for.end
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for.body:
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%div = add i32 %t0, undef
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%add = add nsw i32 %div, 1
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br label %for.cond
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for.end:
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%cmp6 = icmp ne i32 %s, 4
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%conv = zext i1 %cmp6 to i32
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%and7 = and i32 %s, %conv
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%sub = sub i32 %s, %and7
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%cmp9 = icmp ne i32 %sub, 4
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%conv10 = zext i1 %cmp9 to i32
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%sub11 = sub i32 %conv10, %sub
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%and = and i32 %sub11, 1
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ret i32 %and
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}
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