200 lines
5.0 KiB
LLVM
200 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Should fold
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; (%x + %y) u>= %x
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; or
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; (%x + %y) u>= %y
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; to
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; @llvm.uadd.with.overflow(%x, %y) + extractvalue + not
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define i1 @t0_basic(i8 %x, i8 %y) {
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; CHECK-LABEL: @t0_basic(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[Y:%.*]], -1
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp uge i8 %t0, %y
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ret i1 %r
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}
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define <2 x i1> @t1_vec(<2 x i8> %x, <2 x i8> %y) {
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; CHECK-LABEL: @t1_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[Y:%.*]], <i8 -1, i8 -1>
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; CHECK-NEXT: [[R:%.*]] = icmp uge <2 x i8> [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: ret <2 x i1> [[R]]
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;
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%t0 = add <2 x i8> %x, %y
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%r = icmp uge <2 x i8> %t0, %y
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ret <2 x i1> %r
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}
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; Commutativity
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define i1 @t2_symmetry(i8 %x, i8 %y) {
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; CHECK-LABEL: @t2_symmetry(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], -1
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[TMP1]], [[Y:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp uge i8 %t0, %x ; can check against either of `add` arguments
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ret i1 %r
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}
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declare i8 @gen8()
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define i1 @t3_commutative(i8 %x) {
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; CHECK-LABEL: @t3_commutative(
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; CHECK-NEXT: [[Y:%.*]] = call i8 @gen8()
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[Y]], -1
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%y = call i8 @gen8()
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%t0 = add i8 %y, %x ; swapped
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%r = icmp uge i8 %t0, %y
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ret i1 %r
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}
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define i1 @t4_commutative(i8 %x, i8 %y) {
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; CHECK-LABEL: @t4_commutative(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[Y:%.*]], -1
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp ule i8 %y, %t0 ; swapped
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ret i1 %r
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}
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define i1 @t5_commutative(i8 %x) {
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; CHECK-LABEL: @t5_commutative(
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; CHECK-NEXT: [[Y:%.*]] = call i8 @gen8()
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[Y]], -1
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%y = call i8 @gen8()
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%t0 = add i8 %y, %x ; swapped
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%r = icmp ule i8 %y, %t0 ; swapped
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ret i1 %r
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}
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; Extra-use tests
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declare void @use8(i8)
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define i1 @t6_extrause(i8 %x, i8 %y) {
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; CHECK-LABEL: @t6_extrause(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: call void @use8(i8 [[T0]])
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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call void @use8(i8 %t0)
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%r = icmp uge i8 %t0, %y
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ret i1 %r
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}
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; Negative tests
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define i1 @n7_different_y(i8 %x, i8 %y0, i8 %y1) {
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; CHECK-LABEL: @n7_different_y(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y0:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T0]], [[Y1:%.*]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y0
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%r = icmp uge i8 %t0, %y1
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ret i1 %r
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}
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define i1 @n8_wrong_pred0(i8 %x, i8 %y) {
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; CHECK-LABEL: @n8_wrong_pred0(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp ule i8 %t0, %y
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ret i1 %r
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}
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define i1 @n9_wrong_pred1(i8 %x, i8 %y) {
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; CHECK-LABEL: @n9_wrong_pred1(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp ugt i8 %t0, %y
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ret i1 %r
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}
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define i1 @n10_wrong_pred2(i8 %x, i8 %y) {
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; CHECK-LABEL: @n10_wrong_pred2(
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp eq i8 %t0, %y
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ret i1 %r
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}
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define i1 @n11_wrong_pred3(i8 %x, i8 %y) {
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; CHECK-LABEL: @n11_wrong_pred3(
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; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[X:%.*]], 0
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp ne i8 %t0, %y
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ret i1 %r
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}
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define i1 @n12_wrong_pred4(i8 %x, i8 %y) {
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; CHECK-LABEL: @n12_wrong_pred4(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp slt i8 %t0, %y
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ret i1 %r
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}
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define i1 @n13_wrong_pred5(i8 %x, i8 %y) {
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; CHECK-LABEL: @n13_wrong_pred5(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp sle i8 %t0, %y
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ret i1 %r
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}
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define i1 @n14_wrong_pred6(i8 %x, i8 %y) {
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; CHECK-LABEL: @n14_wrong_pred6(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp sgt i8 %t0, %y
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ret i1 %r
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}
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define i1 @n15_wrong_pred7(i8 %x, i8 %y) {
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; CHECK-LABEL: @n15_wrong_pred7(
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; CHECK-NEXT: [[T0:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[T0]], [[Y]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%t0 = add i8 %x, %y
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%r = icmp sge i8 %t0, %y
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ret i1 %r
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}
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