292 lines
12 KiB
LLVM
292 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @extractelement_in_range(<vscale x 4 x i32> %a) {
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; CHECK-LABEL: @extractelement_in_range(
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; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 1
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; CHECK-NEXT: ret i32 [[R]]
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;
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%r = extractelement <vscale x 4 x i32> %a, i64 1
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ret i32 %r
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}
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define i32 @extractelement_maybe_out_of_range(<vscale x 4 x i32> %a) {
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; CHECK-LABEL: @extractelement_maybe_out_of_range(
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; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 4
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; CHECK-NEXT: ret i32 [[R]]
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;
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%r = extractelement <vscale x 4 x i32> %a, i64 4
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ret i32 %r
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}
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define i32 @extractelement_bitcast(float %f) {
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; CHECK-LABEL: @extractelement_bitcast(
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; CHECK-NEXT: [[R:%.*]] = bitcast float [[F:%.*]] to i32
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; CHECK-NEXT: ret i32 [[R]]
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;
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%vec_float = insertelement <vscale x 4 x float> undef, float %f, i32 0
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%vec_int = bitcast <vscale x 4 x float> %vec_float to <vscale x 4 x i32>
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%r = extractelement <vscale x 4 x i32> %vec_int, i32 0
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ret i32 %r
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}
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define i8 @extractelement_bitcast_to_trunc(<vscale x 2 x i32> %a, i32 %x) {
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; CHECK-LABEL: @extractelement_bitcast_to_trunc(
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; CHECK-NEXT: [[R:%.*]] = trunc i32 [[X:%.*]] to i8
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; CHECK-NEXT: ret i8 [[R]]
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;
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%vec = insertelement <vscale x 2 x i32> %a, i32 %x, i32 1
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%vec_cast = bitcast <vscale x 2 x i32> %vec to <vscale x 8 x i8>
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%r = extractelement <vscale x 8 x i8> %vec_cast, i32 4
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ret i8 %r
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}
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; TODO: Instcombine could remove the insert.
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define i8 @extractelement_bitcast_wrong_insert(<vscale x 2 x i32> %a, i32 %x) {
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; CHECK-LABEL: @extractelement_bitcast_wrong_insert(
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; CHECK-NEXT: [[VEC:%.*]] = insertelement <vscale x 2 x i32> [[A:%.*]], i32 [[X:%.*]], i64 1
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; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast <vscale x 2 x i32> [[VEC]] to <vscale x 8 x i8>
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; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 8 x i8> [[VEC_CAST]], i64 2
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; CHECK-NEXT: ret i8 [[R]]
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;
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%vec = insertelement <vscale x 2 x i32> %a, i32 %x, i32 1 ; <- This insert could be removed.
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%vec_cast = bitcast <vscale x 2 x i32> %vec to <vscale x 8 x i8>
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%r = extractelement <vscale x 8 x i8> %vec_cast, i32 2
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ret i8 %r
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}
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define i32 @extractelement_shuffle_maybe_out_of_range(i32 %v) {
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; CHECK-LABEL: @extractelement_shuffle_maybe_out_of_range(
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; CHECK-NEXT: [[IN:%.*]] = insertelement <vscale x 4 x i32> undef, i32 [[V:%.*]], i64 0
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; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[IN]], <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
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; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[SPLAT]], i64 4
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; CHECK-NEXT: ret i32 [[R]]
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;
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%in = insertelement <vscale x 4 x i32> undef, i32 %v, i32 0
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%splat = shufflevector <vscale x 4 x i32> %in, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
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%r = extractelement <vscale x 4 x i32> %splat, i32 4
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ret i32 %r
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}
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define i32 @extractelement_shuffle_invalid_index(i32 %v) {
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; CHECK-LABEL: @extractelement_shuffle_invalid_index(
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; CHECK-NEXT: [[IN:%.*]] = insertelement <vscale x 4 x i32> undef, i32 [[V:%.*]], i64 0
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; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[IN]], <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
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; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[SPLAT]], i64 4294967295
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; CHECK-NEXT: ret i32 [[R]]
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;
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%in = insertelement <vscale x 4 x i32> undef, i32 %v, i32 0
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%splat = shufflevector <vscale x 4 x i32> %in, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
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%r = extractelement <vscale x 4 x i32> %splat, i32 -1
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ret i32 %r
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}
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define <vscale x 4 x i32> @extractelement_insertelement_same_positions(<vscale x 4 x i32> %vec) {
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; CHECK-LABEL: @extractelement_insertelement_same_positions(
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; CHECK-NEXT: ret <vscale x 4 x i32> [[VEC:%.*]]
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;
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%vec.e0 = extractelement <vscale x 4 x i32> %vec, i32 0
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%vec.e1 = extractelement <vscale x 4 x i32> %vec, i32 1
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%vec.e2 = extractelement <vscale x 4 x i32> %vec, i32 2
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%vec.e3 = extractelement <vscale x 4 x i32> %vec, i32 3
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%1 = insertelement <vscale x 4 x i32> %vec, i32 %vec.e0, i32 0
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%2 = insertelement <vscale x 4 x i32> %1, i32 %vec.e1, i32 1
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%3 = insertelement <vscale x 4 x i32> %2, i32 %vec.e2, i32 2
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%4 = insertelement <vscale x 4 x i32> %3, i32 %vec.e3, i32 3
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ret <vscale x 4 x i32> %4
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}
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define <vscale x 4 x i32> @extractelement_insertelement_diff_positions(<vscale x 4 x i32> %vec) {
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; CHECK-LABEL: @extractelement_insertelement_diff_positions(
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; CHECK-NEXT: [[VEC_E0:%.*]] = extractelement <vscale x 4 x i32> [[VEC:%.*]], i64 4
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; CHECK-NEXT: [[VEC_E1:%.*]] = extractelement <vscale x 4 x i32> [[VEC]], i64 5
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; CHECK-NEXT: [[VEC_E2:%.*]] = extractelement <vscale x 4 x i32> [[VEC]], i64 6
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; CHECK-NEXT: [[VEC_E3:%.*]] = extractelement <vscale x 4 x i32> [[VEC]], i64 7
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <vscale x 4 x i32> [[VEC]], i32 [[VEC_E0]], i64 0
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <vscale x 4 x i32> [[TMP1]], i32 [[VEC_E1]], i64 1
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <vscale x 4 x i32> [[TMP2]], i32 [[VEC_E2]], i64 2
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <vscale x 4 x i32> [[TMP3]], i32 [[VEC_E3]], i64 3
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; CHECK-NEXT: ret <vscale x 4 x i32> [[TMP4]]
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;
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%vec.e0 = extractelement <vscale x 4 x i32> %vec, i32 4
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%vec.e1 = extractelement <vscale x 4 x i32> %vec, i32 5
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%vec.e2 = extractelement <vscale x 4 x i32> %vec, i32 6
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%vec.e3 = extractelement <vscale x 4 x i32> %vec, i32 7
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%1 = insertelement <vscale x 4 x i32> %vec, i32 %vec.e0, i32 0
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%2 = insertelement <vscale x 4 x i32> %1, i32 %vec.e1, i32 1
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%3 = insertelement <vscale x 4 x i32> %2, i32 %vec.e2, i32 2
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%4 = insertelement <vscale x 4 x i32> %3, i32 %vec.e3, i32 3
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ret <vscale x 4 x i32> %4
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}
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define i32 @bitcast_of_extractelement( <vscale x 2 x float> %d) {
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; CHECK-LABEL: @bitcast_of_extractelement(
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; CHECK-NEXT: [[BC:%.*]] = bitcast <vscale x 2 x float> [[D:%.*]] to <vscale x 2 x i32>
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; CHECK-NEXT: [[CAST:%.*]] = extractelement <vscale x 2 x i32> [[BC]], i64 0
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; CHECK-NEXT: ret i32 [[CAST]]
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;
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%ext = extractelement <vscale x 2 x float> %d, i32 0
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%cast = bitcast float %ext to i32
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ret i32 %cast
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}
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define i1 @extractelement_is_zero(<vscale x 2 x i32> %d, i1 %b, i32 %z) {
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; CHECK-LABEL: @extractelement_is_zero(
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; CHECK-NEXT: [[EXT:%.*]] = extractelement <vscale x 2 x i32> [[D:%.*]], i64 0
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; CHECK-NEXT: [[BB:%.*]] = icmp eq i32 [[EXT]], 0
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; CHECK-NEXT: ret i1 [[BB]]
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;
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%ext = extractelement <vscale x 2 x i32> %d, i32 0
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%bb = icmp eq i32 %ext, 0
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ret i1 %bb
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}
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; OSS-Fuzz #25272
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; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=25272
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define i32 @ossfuzz_25272(float %f) {
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; CHECK-LABEL: @ossfuzz_25272(
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; CHECK-NEXT: [[VEC_FLOAT:%.*]] = insertelement <vscale x 4 x float> undef, float [[F:%.*]], i64 0
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; CHECK-NEXT: [[VEC_INT:%.*]] = bitcast <vscale x 4 x float> [[VEC_FLOAT]] to <vscale x 4 x i32>
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; CHECK-NEXT: [[E:%.*]] = extractelement <vscale x 4 x i32> [[VEC_INT]], i64 2147483647
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; CHECK-NEXT: ret i32 [[E]]
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;
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%vec_float = insertelement <vscale x 4 x float> undef, float %f, i32 0
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%vec_int = bitcast <vscale x 4 x float> %vec_float to <vscale x 4 x i32>
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%E = extractelement <vscale x 4 x i32> %vec_int, i32 2147483647
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ret i32 %E
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}
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; Step vector optimization
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define i64 @ext_lane0_from_stepvec() {
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; CHECK-LABEL: @ext_lane0_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i64 0
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;
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entry:
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%0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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%1 = extractelement <vscale x 4 x i64> %0, i32 0
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ret i64 %1
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}
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define i32 @ext_lane3_from_stepvec() {
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; CHECK-LABEL: @ext_lane3_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i32 3
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;
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entry:
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%0 = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
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%1 = extractelement <vscale x 4 x i32> %0, i64 3
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ret i32 %1
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}
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define i64 @ext_lane_out_of_range_from_stepvec() {
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; CHECK-LABEL: @ext_lane_out_of_range_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <vscale x 4 x i64> [[TMP0]], i64 4
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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entry:
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%0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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%1 = extractelement <vscale x 4 x i64> %0, i32 4
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ret i64 %1
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}
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define i64 @ext_lane_invalid_from_stepvec() {
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; CHECK-LABEL: @ext_lane_invalid_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <vscale x 4 x i64> [[TMP0]], i64 4294967295
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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entry:
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%0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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%1 = extractelement <vscale x 4 x i64> %0, i32 -1
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ret i64 %1
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}
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define i64 @ext_lane_unknown_from_stepvec(i32 %v) {
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; CHECK-LABEL: @ext_lane_unknown_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <vscale x 4 x i64> [[TMP0]], i32 [[V:%.*]]
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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entry:
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%0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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%1 = extractelement <vscale x 4 x i64> %0, i32 %v
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ret i64 %1
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}
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; Check that undef is returned when the extracted element has wrapped.
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define i8 @ext_lane256_from_stepvec() {
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; CHECK-LABEL: @ext_lane256_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i8 undef
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;
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entry:
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%0 = call <vscale x 512 x i8> @llvm.experimental.stepvector.nxv512i8()
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%1 = extractelement <vscale x 512 x i8> %0, i64 256
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ret i8 %1
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}
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define i8 @ext_lane255_from_stepvec() {
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; CHECK-LABEL: @ext_lane255_from_stepvec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i8 -1
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;
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entry:
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%0 = call <vscale x 512 x i8> @llvm.experimental.stepvector.nxv512i8()
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%1 = extractelement <vscale x 512 x i8> %0, i64 255
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ret i8 %1
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}
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; Check that we can extract more complex cases where the stepvector is
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; involved in a binary operation prior to the lane being extracted.
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define i64 @ext_lane0_from_add_with_stepvec(i64 %i) {
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; CHECK-LABEL: @ext_lane0_from_add_with_stepvec(
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; CHECK-NEXT: ret i64 [[I:%.*]]
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;
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%tmp = insertelement <vscale x 2 x i64> poison, i64 %i, i32 0
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%splatofi = shufflevector <vscale x 2 x i64> %tmp, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
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%stepvec = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
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%add = add <vscale x 2 x i64> %splatofi, %stepvec
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%res = extractelement <vscale x 2 x i64> %add, i32 0
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ret i64 %res
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}
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define i1 @ext_lane1_from_cmp_with_stepvec(i64 %i) {
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; CHECK-LABEL: @ext_lane1_from_cmp_with_stepvec(
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i64 [[I:%.*]], 1
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%tmp = insertelement <vscale x 2 x i64> poison, i64 %i, i32 0
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%splatofi = shufflevector <vscale x 2 x i64> %tmp, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
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%stepvec = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
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%cmp = icmp eq <vscale x 2 x i64> %splatofi, %stepvec
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%res = extractelement <vscale x 2 x i1> %cmp, i32 1
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ret i1 %res
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}
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define i64* @ext_lane_from_bitcast_of_splat(i32* %v) {
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; CHECK-LABEL: @ext_lane_from_bitcast_of_splat(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[R:%.*]] = bitcast i32* [[V:%.*]] to i64*
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; CHECK-NEXT: ret i64* [[R]]
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;
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entry:
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%in = insertelement <vscale x 4 x i32*> poison, i32* %v, i32 0
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%splat = shufflevector <vscale x 4 x i32*> %in, <vscale x 4 x i32*> poison, <vscale x 4 x i32> zeroinitializer
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%bc = bitcast <vscale x 4 x i32*> %splat to <vscale x 4 x i64*>
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%r = extractelement <vscale x 4 x i64*> %bc, i32 3
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ret i64* %r
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}
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declare <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
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declare <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
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declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
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declare <vscale x 512 x i8> @llvm.experimental.stepvector.nxv512i8()
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