llvm-project/llvm/test/Transforms/LoopVectorize/PowerPC
Simon Pilgrim fbe72e41b9 [LoopVectorize] Add PR41179 test case 2021-11-14 21:54:23 +00:00
..
interleave_IC.ll
large-loop-rdx.ll
lit.local.cfg
massv-altivec.ll
massv-calls.ll
massv-nobuiltin.ll
massv-unsupported.ll
optimal-epilog-vectorization-profitability.ll
optimal-epilog-vectorization.ll Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
pr30990.ll
pr41179.ll [LoopVectorize] Add PR41179 test case 2021-11-14 21:54:23 +00:00
reg-usage.ll [NFC][LoopVectorize] Remove setBestPlan in favour of getBestPlanFor 2021-10-27 09:38:27 +01:00
small-loop-rdx.ll
stride-vectorization.ll
vectorize-bswap.ll
vectorize-only-for-real.ll
vsx-tsvc-s173.ll
widened-massv-call.ll [opt] Directly translate -O# to -passes='default<O#>' 2021-10-18 16:48:10 -07:00
widened-massv-vfabi-attr.ll