Craig Topper a9486a40f7 [RISCV] Disable interleaving scalar loops in the loop vectorizer. ... The loop vectorizer can interleave scalar loops even if it doesn't vectorize them. I don't believe we intended to enable this when we enabled interleaving for vector instructions. Disable interleaving for VF=1 like X86 and AMDGPU already do. Test lifted from AMDGPU. Differential Revision: https://reviews.llvm.org/D115975		2021-12-23 08:37:24 -06:00
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lit.local.cfg	…
masked_gather_scatter.ll	[LV] Update test that was missed in e844f05397.	2021-10-18 18:23:00 +01:00
riscv-interleaved.ll	Mark test as requiring asserts.	2021-06-01 02:01:01 -07:00
riscv-unroll.ll	…
scalable-reductions.ll	[RISCV] Add legality check for vectorizing reduction	2021-05-20 17:45:46 +08:00
scalable-vf-hint.ll	…
unroll-in-loop-vectorizer.ll	[RISCV] Disable interleaving scalar loops in the loop vectorizer.	2021-12-23 08:37:24 -06:00