342 lines
10 KiB
C
342 lines
10 KiB
C
// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
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// expected-no-diagnostics
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// REQUIRES: x86-registered-target
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#ifndef HEADER
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#define HEADER
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_Bool bv, bx;
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char cv, cx;
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unsigned char ucv, ucx;
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short sv, sx;
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unsigned short usv, usx;
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int iv, ix;
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unsigned int uiv, uix;
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long lv, lx;
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unsigned long ulv, ulx;
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long long llv, llx;
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unsigned long long ullv, ullx;
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float fv, fx;
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double dv, dx;
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long double ldv, ldx;
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_Complex int civ, cix;
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_Complex float cfv, cfx;
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_Complex double cdv, cdx;
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typedef int int4 __attribute__((__vector_size__(16)));
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int4 int4x;
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struct BitFields {
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int : 32;
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int a : 31;
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} bfx;
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struct BitFields_packed {
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int : 32;
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int a : 31;
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} __attribute__ ((__packed__)) bfx_packed;
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struct BitFields2 {
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int : 31;
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int a : 1;
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} bfx2;
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struct BitFields2_packed {
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int : 31;
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int a : 1;
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} __attribute__ ((__packed__)) bfx2_packed;
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struct BitFields3 {
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int : 11;
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int a : 14;
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} bfx3;
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struct BitFields3_packed {
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int : 11;
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int a : 14;
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} __attribute__ ((__packed__)) bfx3_packed;
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struct BitFields4 {
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short : 16;
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int a: 1;
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long b : 7;
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} bfx4;
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struct BitFields4_packed {
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short : 16;
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int a: 1;
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long b : 7;
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} __attribute__ ((__packed__)) bfx4_packed;
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typedef float float2 __attribute__((ext_vector_type(2)));
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float2 float2x;
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// Register "0" is currently an invalid register for global register variables.
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// Use "esp" instead of "0".
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// register int rix __asm__("0");
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register int rix __asm__("esp");
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int main() {
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// CHECK: load atomic i8, i8*
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// CHECK: store i8
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#pragma omp atomic read
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bv = bx;
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// CHECK: load atomic i8, i8*
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// CHECK: store i8
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#pragma omp atomic read
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cv = cx;
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// CHECK: load atomic i8, i8*
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// CHECK: store i8
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#pragma omp atomic read
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ucv = ucx;
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// CHECK: load atomic i16, i16*
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// CHECK: store i16
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#pragma omp atomic read
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sv = sx;
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// CHECK: load atomic i16, i16*
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// CHECK: store i16
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#pragma omp atomic read
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usv = usx;
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// CHECK: load atomic i32, i32*
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// CHECK: store i32
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#pragma omp atomic read
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iv = ix;
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// CHECK: load atomic i32, i32*
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// CHECK: store i32
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#pragma omp atomic read
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uiv = uix;
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// CHECK: load atomic i64, i64*
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// CHECK: store i64
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#pragma omp atomic read
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lv = lx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i64
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#pragma omp atomic read
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ulv = ulx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i64
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#pragma omp atomic read
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llv = llx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i64
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#pragma omp atomic read
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ullv = ullx;
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// CHECK: load atomic i32, i32* bitcast (float*
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// CHECK: bitcast i32 {{.*}} to float
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// CHECK: store float
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#pragma omp atomic read
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fv = fx;
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// CHECK: load atomic i64, i64* bitcast (double*
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// CHECK: bitcast i64 {{.*}} to double
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// CHECK: store double
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#pragma omp atomic read
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dv = dx;
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// CHECK: [[LD:%.+]] = load atomic i128, i128* bitcast (x86_fp80*
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// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i128*
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// CHECK: store i128 [[LD]], i128* [[BITCAST]]
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// CHECK: [[LD:%.+]] = load x86_fp80, x86_fp80* [[LDTEMP]]
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// CHECK: store x86_fp80 [[LD]]
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#pragma omp atomic read
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ldv = ldx;
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// CHECK: call{{.*}} void @__atomic_load(i64 8,
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// CHECK: store i32
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// CHECK: store i32
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#pragma omp atomic read
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civ = cix;
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// CHECK: call{{.*}} void @__atomic_load(i64 8,
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// CHECK: store float
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// CHECK: store float
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#pragma omp atomic read
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cfv = cfx;
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// CHECK: call{{.*}} void @__atomic_load(i64 16,
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// CHECK: call{{.*}} @__kmpc_flush(
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// CHECK: store double
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// CHECK: store double
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#pragma omp atomic seq_cst read
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cdv = cdx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i8
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#pragma omp atomic read
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bv = ulx;
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// CHECK: load atomic i8, i8*
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// CHECK: store i8
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#pragma omp atomic read
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cv = bx;
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// CHECK: load atomic i8, i8*
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// CHECK: call{{.*}} @__kmpc_flush(
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// CHECK: store i8
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#pragma omp atomic read, seq_cst
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ucv = cx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i16
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#pragma omp atomic read
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sv = ulx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i16
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#pragma omp atomic read
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usv = lx;
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// CHECK: load atomic i32, i32*
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// CHECK: call{{.*}} @__kmpc_flush(
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// CHECK: store i32
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#pragma omp atomic seq_cst, read
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iv = uix;
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// CHECK: load atomic i32, i32*
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// CHECK: store i32
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#pragma omp atomic read
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uiv = ix;
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// CHECK: call{{.*}} void @__atomic_load(i64 8,
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// CHECK: store i64
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#pragma omp atomic read
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lv = cix;
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// CHECK: load atomic i32, i32*
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// CHECK: store i64
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#pragma omp atomic read
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ulv = fx;
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// CHECK: load atomic i64, i64*
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// CHECK: store i64
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#pragma omp atomic read
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llv = dx;
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// CHECK: load atomic i128, i128*
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// CHECK: store i64
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#pragma omp atomic read
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ullv = ldx;
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// CHECK: call{{.*}} void @__atomic_load(i64 8,
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// CHECK: store float
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#pragma omp atomic read
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fv = cix;
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// CHECK: load atomic i16, i16*
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// CHECK: store double
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#pragma omp atomic read
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dv = sx;
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// CHECK: load atomic i8, i8*
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bx;
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// CHECK: load atomic i8, i8*
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// CHECK: store i32
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// CHECK: store i32
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#pragma omp atomic read
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civ = bx;
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// CHECK: load atomic i16, i16*
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// CHECK: store float
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// CHECK: store float
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#pragma omp atomic read
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cfv = usx;
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// CHECK: load atomic i64, i64*
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// CHECK: store double
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// CHECK: store double
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#pragma omp atomic read
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cdv = llx;
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// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* @{{.+}} to i128*) monotonic
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// CHECK: [[I128PTR:%.+]] = bitcast <4 x i32>* [[LDTEMP:%.+]] to i128*
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// CHECK: store i128 [[I128VAL]], i128* [[I128PTR]]
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// CHECK: [[LD:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]]
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// CHECK: extractelement <4 x i32> [[LD]]
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// CHECK: store i8
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#pragma omp atomic read
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bv = int4x[0];
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// CHECK: [[LD:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%{{.+}}* @{{.+}} to i8*), i64 4) to i32*) monotonic
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// CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1
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// CHECK: ashr i32 [[SHL]], 1
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx.a;
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// CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
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// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @bfx_packed to i8*), i64 4), i8* [[LDTEMP_VOID_PTR]], i32 0)
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// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1
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// CHECK: ashr i32 [[SHL]], 1
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx_packed.a;
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// CHECK: [[LD:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @bfx2, i32 0, i32 0) monotonic
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// CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
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// CHECK: ashr i32 [[LD]], 31
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx2.a;
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// CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @bfx2_packed to i8*), i64 3) monotonic
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// CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]]
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// CHECK: ashr i8 [[LD]], 7
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx2_packed.a;
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// CHECK: [[LD:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @bfx3, i32 0, i32 0) monotonic
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// CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i32 [[LD]], 7
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// CHECK: ashr i32 [[SHL]], 18
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx3.a;
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// CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i24* [[LDTEMP:%.+]] to i8*
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// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @bfx3_packed to i8*), i64 1), i8* [[LDTEMP_VOID_PTR]], i32 0)
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// CHECK: [[LD:%.+]] = load i24, i24* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i24 [[LD]], 7
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// CHECK: [[ASHR:%.+]] = ashr i24 [[SHL]], 10
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// CHECK: sext i24 [[ASHR]] to i32
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx3_packed.a;
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// CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @bfx4 to i64*) monotonic
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// CHECK: store i64 [[LD]], i64* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i64, i64* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i64 [[LD]], 47
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// CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 63
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// CHECK: trunc i64 [[ASHR]] to i32
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx4.a;
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// CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @bfx4_packed, i32 0, i32 0, i64 2) monotonic
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// CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i8 [[LD]], 7
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// CHECK: [[ASHR:%.+]] = ashr i8 [[SHL]], 7
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// CHECK: sext i8 [[ASHR]] to i32
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx4_packed.a;
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// CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @bfx4 to i64*) monotonic
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// CHECK: store i64 [[LD]], i64* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i64, i64* [[LDTEMP]]
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// CHECK: [[SHL:%.+]] = shl i64 [[LD]], 40
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// CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 57
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx4.b;
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// CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @bfx4_packed, i32 0, i32 0, i64 2) monotonic
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// CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]]
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// CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]]
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// CHECK: [[ASHR:%.+]] = ashr i8 [[LD]], 1
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// CHECK: sext i8 [[ASHR]] to i64
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// CHECK: store x86_fp80
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#pragma omp atomic read
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ldv = bfx4_packed.b;
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// CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (<2 x float>* @{{.+}} to i64*) monotonic
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// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP:%.+]] to i64*
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// CHECK: store i64 [[LD]], i64* [[BITCAST]]
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// CHECK: [[LD:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
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// CHECK: extractelement <2 x float> [[LD]]
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// CHECK: store i64
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#pragma omp atomic read
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ulv = float2x.x;
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// CHECK: call{{.*}} i{{[0-9]+}} @llvm.read_register
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// CHECK: call{{.*}} @__kmpc_flush(
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// CHECK: store double
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#pragma omp atomic read seq_cst
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dv = rix;
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return 0;
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}
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#endif
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