llvm-project/llvm/test/MC/Disassembler
Stanislav Mekhanoshin 72c1a0d9c2 [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
This is undocumented, but it should work.

Differential Revision: https://reviews.llvm.org/D122252
2022-03-22 13:52:29 -07:00
..
AArch64 [AArch64] Move FeatureSpecRestrict into core 8.0-R architecture. 2022-03-07 15:55:08 +00:00
AMDGPU [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a 2022-03-22 13:52:29 -07:00
ARC [ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions 2021-08-25 07:46:15 -07:00
ARM [ARM] Implement PAC return address signing mechanism for PACBTI-M 2021-12-07 10:15:19 +00:00
Hexagon
Lanai
M68k [M68k] Adopt VarLenCodeEmitter for bits instructions 2022-02-17 14:16:19 -08:00
MSP430
Mips
PowerPC [PowerPC] Add the Power10 LXVKQ instrution. 2022-02-23 08:48:59 -06:00
RISCV [RISCV] Add support for Zihintpause extention 2022-02-03 20:55:47 +08:00
Sparc
SystemZ [SystemZ] Add support for new cpu architecture - arch14 2021-07-26 16:57:28 +02:00
WebAssembly [WebAssembly] Update v128.any_true 2021-04-11 11:13:16 -07:00
X86 [X86] Emit REX prefix immediately before the opcode 2022-03-16 08:30:31 -07:00
XCore