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AsmParser
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[AArch64] Allow .variant_pcs before the symbol is registered
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2022-03-28 17:52:27 -07:00 |
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Disassembler
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[Disassember][NFCI] Use strong type for instruction decoder
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2022-03-25 18:53:59 -07:00 |
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GISel
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[AArch64][GlobalISel] Add new MOVI pattern for fp constants
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2022-03-29 10:57:22 +08:00 |
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MCTargetDesc
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[AArch64] Allow .variant_pcs before the symbol is registered
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2022-03-28 17:52:27 -07:00 |
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TargetInfo
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Fix shlib builds for all lib/Target/*/TargetInfo libs
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2021-10-08 15:21:13 -07:00 |
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Utils
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[SVE][CodeGen] Use splice instruction when lowering VECTOR_SPLICE
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2022-01-11 11:58:17 +00:00 |
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AArch64.h
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Cleanup includes: LLVMTarget
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2022-03-10 10:00:29 +01:00 |
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AArch64.td
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Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
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2022-03-23 11:43:43 +00:00 |
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AArch64A53Fix835769.cpp
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[AArch64] Use Feature for A53 Erratum 835769 Fix
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2021-12-10 15:09:59 +00:00 |
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AArch64A57FPLoadBalancing.cpp
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…
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AArch64AdvSIMDScalarPass.cpp
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[llvm] Use range-based for loops (NFC)
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2021-12-11 11:29:12 -08:00 |
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AArch64AsmPrinter.cpp
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[AArch64][GlobalISel] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:54:41 +00:00 |
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AArch64BranchTargets.cpp
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…
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AArch64CallingConvention.cpp
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…
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AArch64CallingConvention.h
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…
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AArch64CallingConvention.td
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AArch64: don't claim to preserve registers used by prologue code
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2022-01-10 12:27:04 +00:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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…
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AArch64CollectLOH.cpp
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…
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AArch64Combine.td
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[AArch64][GlobalISel] Split vector stores of zero.
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2021-12-09 19:04:48 -08:00 |
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AArch64CompressJumpTables.cpp
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…
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AArch64CondBrTuning.cpp
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[llvm] Use range-based for loops (NFC)
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2021-11-28 10:04:54 -08:00 |
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AArch64ConditionOptimizer.cpp
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…
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AArch64ConditionalCompares.cpp
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[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
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2022-03-16 20:25:42 +08:00 |
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AArch64DeadRegisterDefinitionsPass.cpp
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…
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AArch64ExpandImm.cpp
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[llvm] Use range-based for loops (NFC)
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2021-12-11 11:29:12 -08:00 |
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AArch64ExpandImm.h
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…
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AArch64ExpandPseudoInsts.cpp
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Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
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2022-03-23 11:43:43 +00:00 |
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AArch64FalkorHWPFFix.cpp
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[llvm] Use depth_first (NFC)
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2021-12-21 22:28:48 -08:00 |
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AArch64FastISel.cpp
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Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
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2022-03-23 11:43:43 +00:00 |
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AArch64FrameLowering.cpp
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[AArch64] Async unwind - function prologues
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2022-03-24 16:16:44 +00:00 |
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AArch64FrameLowering.h
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[AArch64] Async unwind - function prologues
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2022-03-24 16:16:44 +00:00 |
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AArch64GenRegisterBankInfo.def
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…
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AArch64ISelDAGToDAG.cpp
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[NFC][SVE] Refactor SelectSVEAddSubImm to match SelectSVECpyDupImm.
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2022-02-25 16:12:35 +00:00 |
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AArch64ISelLowering.cpp
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[AArch64] Ensure fixed point fptoi_sat has correct saturation width
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2022-03-29 10:12:44 +01:00 |
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AArch64ISelLowering.h
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Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
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2022-03-23 11:43:43 +00:00 |
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AArch64InstrAtomics.td
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AArch64: do not use xzr for ldxp -> stxp dataflow.
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2022-02-09 12:29:16 +00:00 |
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AArch64InstrFormats.td
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[AArch64][GlobalISel] Add new MOVI pattern for fp constants
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2022-03-29 10:57:22 +08:00 |
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AArch64InstrGISel.td
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…
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AArch64InstrInfo.cpp
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[AArch64] Async unwind - function prologues
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2022-03-24 16:16:44 +00:00 |
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AArch64InstrInfo.h
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[AArch64] Async unwind - function prologues
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2022-03-24 16:16:44 +00:00 |
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AArch64InstrInfo.td
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Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
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2022-03-23 11:43:43 +00:00 |
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AArch64LoadStoreOptimizer.cpp
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[AArch64] Pass Reg instead of MI to tryToFindRenameRegister (NFC).
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2022-03-01 14:02:02 +00:00 |
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AArch64LowerHomogeneousPrologEpilog.cpp
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[llvm] Use llvm::is_contained (NFC)
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2021-10-14 22:44:09 -07:00 |
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AArch64MCInstLower.cpp
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…
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AArch64MCInstLower.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
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AArch64MIPeepholeOpt.cpp
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[AArch64] Adds SUBS and ADDS instructions to the MIPeepholeOpt.
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2022-02-19 15:35:53 +00:00 |
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AArch64MachineFunctionInfo.cpp
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Revert "[AArch64] Async unwind - function epilogues"
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2022-03-02 15:01:57 +00:00 |
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AArch64MachineFunctionInfo.h
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Cleanup codegen includes
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2022-03-16 08:43:00 +01:00 |
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AArch64MacroFusion.cpp
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…
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AArch64MacroFusion.h
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…
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AArch64PBQPRegAlloc.cpp
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…
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AArch64PBQPRegAlloc.h
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…
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AArch64PerfectShuffle.h
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…
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AArch64PfmCounters.td
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…
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AArch64PromoteConstant.cpp
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…
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AArch64RedundantCopyElimination.cpp
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…
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AArch64RegisterBanks.td
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…
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AArch64RegisterInfo.cpp
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Reduce dependencies on llvm/BinaryFormat/Dwarf.h
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2022-02-04 11:44:03 +01:00 |
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AArch64RegisterInfo.h
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…
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AArch64RegisterInfo.td
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…
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AArch64SIMDInstrOpt.cpp
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[llvm] Use nullptr instead of 0 (NFC)
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2021-12-28 08:52:25 -08:00 |
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AArch64SLSHardening.cpp
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[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
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2022-03-16 20:25:42 +08:00 |
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AArch64SMEInstrInfo.td
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[AArch64][SME] Add rdsvl instruction
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2022-02-28 23:14:50 +00:00 |
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AArch64SVEInstrInfo.td
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[SVE] Update patterns to commute FMLS multiplication operands
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2022-03-01 12:53:14 -08:00 |
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AArch64SchedA53.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SchedA55.td
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Partially revert "[SchedModels][CortexA55] Add ASIMD integer instructions"
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2022-02-28 10:58:52 +00:00 |
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AArch64SchedA57.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedA57WriteRes.td
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…
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AArch64SchedA64FX.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedCyclone.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SchedExynosM3.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedExynosM4.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedExynosM5.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedFalkor.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SchedFalkorDetails.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedKryo.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SchedKryoDetails.td
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…
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AArch64SchedPredExynos.td
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[AArch64][SchedModels] Handle virtual registers in FP/NEON predicates
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2022-02-17 13:41:05 +03:00 |
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AArch64SchedPredicates.td
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[AArch64][SchedModels] Handle virtual registers in FP/NEON predicates
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2022-02-17 13:41:05 +03:00 |
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AArch64SchedTSV110.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SchedThunderX.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SchedThunderX2T99.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64SchedThunderX3T110.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
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AArch64Schedule.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
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AArch64SelectionDAGInfo.cpp
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[AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:56:27 +00:00 |
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AArch64SelectionDAGInfo.h
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[AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:56:27 +00:00 |
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AArch64SpeculationHardening.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
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AArch64StackTagging.cpp
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[NFC] [MTE] [HWASan] fixed orphaned comments.
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2022-03-08 16:42:31 -08:00 |
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AArch64StackTaggingPreRA.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
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AArch64StorePairSuppress.cpp
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[AArch64] Disable AArch64StorePairSuppress under optsize
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2021-10-04 18:28:15 +01:00 |
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AArch64Subtarget.cpp
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[AArch64] Set MaxBytesForLoopAlignment for more targets
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2022-03-31 11:37:11 +01:00 |
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AArch64Subtarget.h
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[ARM][AArch64] generate subtarget feature flags
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2022-03-18 16:07:00 +00:00 |
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AArch64SystemOperands.td
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[AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs.
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2022-01-20 13:37:58 +00:00 |
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AArch64TargetMachine.cpp
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Cleanup includes: DebugInfo & CodeGen
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2022-03-12 17:26:40 +01:00 |
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AArch64TargetMachine.h
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mark getTargetTransformInfo and getTargetIRAnalysis as const
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2022-02-25 14:30:44 -05:00 |
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AArch64TargetObjectFile.cpp
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[Target] Remove redundant member initialization (NFC)
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2022-01-06 22:01:44 -08:00 |
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AArch64TargetObjectFile.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
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AArch64TargetTransformInfo.cpp
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Recommit "[SLP] Fix lookahead operand reordering for splat loads." attempt 3, fixed assertion crash.
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2022-03-23 18:32:17 -07:00 |
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AArch64TargetTransformInfo.h
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Recommit "[SLP] Fix lookahead operand reordering for splat loads." attempt 3, fixed assertion crash.
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2022-03-23 18:32:17 -07:00 |
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CMakeLists.txt
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Third Recommit "[AArch64] Split bitmask immediate of bitwise AND operation"
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2021-10-08 11:28:49 +01:00 |
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SMEInstrFormats.td
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[AArch64][SME] Update DUP (predicate) instruction
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2021-10-07 08:55:11 +00:00 |
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SVEInstrFormats.td
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[AArch64][SVE] Mark {CNT*,RDVL,INDEX} as materializable
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2022-03-31 15:28:24 +00:00 |
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SVEIntrinsicOpts.cpp
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[Aarch64] Remove redundant declaration initializeSVEIntrinsicOptsPass (NFC)
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2022-01-01 09:14:25 -08:00 |
