188 lines
7.9 KiB
LLVM
188 lines
7.9 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math | FileCheck %s --check-prefix=CST --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+sse4.1 | FileCheck %s --check-prefix=CST --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx | FileCheck %s --check-prefix=CST --check-prefix=AVX
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
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; Check that the constant used in the vectors are the right ones.
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; SSE2: [[MASKCSTADDR:.LCPI[0-9_]+]]:
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; SSE2-NEXT: .long 65535 # 0xffff
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; SSE2-NEXT: .long 65535 # 0xffff
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; SSE2-NEXT: .long 65535 # 0xffff
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; SSE2-NEXT: .long 65535 # 0xffff
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; CST: [[LOWCSTADDR:.LCPI[0-9_]+]]:
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; CST-NEXT: .long 1258291200 # 0x4b000000
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; CST-NEXT: .long 1258291200 # 0x4b000000
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; CST-NEXT: .long 1258291200 # 0x4b000000
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; CST-NEXT: .long 1258291200 # 0x4b000000
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; CST: [[HIGHCSTADDR:.LCPI[0-9_]+]]:
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; CST-NEXT: .long 1392508928 # 0x53000000
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; CST-NEXT: .long 1392508928 # 0x53000000
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; CST-NEXT: .long 1392508928 # 0x53000000
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; CST-NEXT: .long 1392508928 # 0x53000000
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; CST: [[MAGICCSTADDR:.LCPI[0-9_]+]]:
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; CST-NEXT: .long 0x53000080 # float 5.49764202E+11
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; CST-NEXT: .long 0x53000080 # float 5.49764202E+11
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; CST-NEXT: .long 0x53000080 # float 5.49764202E+11
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; CST-NEXT: .long 0x53000080 # float 5.49764202E+11
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; AVX2: [[LOWCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 1258291200 # 0x4b000000
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; AVX2: [[HIGHCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 1392508928 # 0x53000000
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; AVX2: [[MAGICCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 0x53000080 # float 5.49764202E+11
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define <4 x float> @test_uitofp_v4i32_to_v4f32(<4 x i32> %arg) {
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; SSE2-LABEL: test_uitofp_v4i32_to_v4f32:
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; SSE2: movdqa [[MASKCSTADDR]](%rip), [[MASK:%xmm[0-9]+]]
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; SSE2-NEXT: pand %xmm0, [[MASK]]
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; After this instruction, MASK will have the value of the low parts
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; of the vector.
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; SSE2-NEXT: por [[LOWCSTADDR]](%rip), [[MASK]]
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; SSE2-NEXT: psrld $16, %xmm0
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; SSE2-NEXT: por [[HIGHCSTADDR]](%rip), %xmm0
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; SSE2-NEXT: subps [[MAGICCSTADDR]](%rip), %xmm0
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; SSE2-NEXT: addps [[MASK]], %xmm0
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; SSE2-NEXT: retq
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;
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; Currently we commute the arguments of the first blend, but this could be
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; improved to match the lowering of the second blend.
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; SSE41-LABEL: test_uitofp_v4i32_to_v4f32:
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; SSE41: movdqa [[LOWCSTADDR]](%rip), [[LOWVEC:%xmm[0-9]+]]
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; SSE41-NEXT: pblendw $85, %xmm0, [[LOWVEC]]
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; SSE41-NEXT: psrld $16, %xmm0
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; SSE41-NEXT: pblendw $170, [[HIGHCSTADDR]](%rip), %xmm0
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; SSE41-NEXT: subps [[MAGICCSTADDR]](%rip), %xmm0
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; SSE41-NEXT: addps [[LOWVEC]], %xmm0
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: test_uitofp_v4i32_to_v4f32:
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; AVX: vpblendw $170, [[LOWCSTADDR]](%rip), %xmm0, [[LOWVEC:%xmm[0-9]+]]
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; AVX-NEXT: vpsrld $16, %xmm0, [[SHIFTVEC:%xmm[0-9]+]]
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; AVX-NEXT: vpblendw $170, [[HIGHCSTADDR]](%rip), [[SHIFTVEC]], [[HIGHVEC:%xmm[0-9]+]]
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; AVX-NEXT: vsubps [[MAGICCSTADDR]](%rip), [[HIGHVEC]], [[TMP:%xmm[0-9]+]]
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; AVX-NEXT: vaddps [[TMP]], [[LOWVEC]], %xmm0
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; AVX-NEXT: retq
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;
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; The lowering for AVX2 is a bit messy, because we select broadcast
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; instructions, instead of folding the constant loads.
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; AVX2-LABEL: test_uitofp_v4i32_to_v4f32:
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; AVX2: vpbroadcastd [[LOWCSTADDR]](%rip), [[LOWCST:%xmm[0-9]+]]
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; AVX2-NEXT: vpblendw $170, [[LOWCST]], %xmm0, [[LOWVEC:%xmm[0-9]+]]
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; AVX2-NEXT: vpsrld $16, %xmm0, [[SHIFTVEC:%xmm[0-9]+]]
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; AVX2-NEXT: vpbroadcastd [[HIGHCSTADDR]](%rip), [[HIGHCST:%xmm[0-9]+]]
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; AVX2-NEXT: vpblendw $170, [[HIGHCST]], [[SHIFTVEC]], [[HIGHVEC:%xmm[0-9]+]]
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; AVX2-NEXT: vbroadcastss [[MAGICCSTADDR]](%rip), [[MAGICCST:%xmm[0-9]+]]
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; AVX2-NEXT: vsubps [[MAGICCST]], [[HIGHVEC]], [[TMP:%xmm[0-9]+]]
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; AVX2-NEXT: vaddps [[TMP]], [[LOWVEC]], %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: test_uitofp_v4i32_to_v4f32:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
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; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
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; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; AVX512F-NEXT: vzeroupper
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; AVX512F-NEXT: retq
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;
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; AVX512VL-LABEL: test_uitofp_v4i32_to_v4f32:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vcvtudq2ps %xmm0, %xmm0
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; AVX512VL-NEXT: retq
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%tmp = uitofp <4 x i32> %arg to <4 x float>
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ret <4 x float> %tmp
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}
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; Match the AVX2 constants used in the next function
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; AVX2: [[LOWCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 1258291200 # 0x4b000000
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; AVX2: [[HIGHCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 1392508928 # 0x53000000
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; AVX2: [[MAGICCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 0x53000080 # float 5.49764202E+11
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define <8 x float> @test_uitofp_v8i32_to_v8f32(<8 x i32> %arg) {
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; Legalization will break the thing is 2 x <4 x i32> on anthing prior AVX.
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; The constant used for in the vector instruction are shared between the
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; two sequences of instructions.
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;
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; SSE2-LABEL: test_uitofp_v8i32_to_v8f32:
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; SSE2: movdqa {{.*#+}} [[MASK:xmm[0-9]+]] = [65535,65535,65535,65535]
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; SSE2-NEXT: movdqa %xmm0, [[VECLOW:%xmm[0-9]+]]
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; SSE2-NEXT: pand %[[MASK]], [[VECLOW]]
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; SSE2-NEXT: movdqa {{.*#+}} [[LOWCST:xmm[0-9]+]] = [1258291200,1258291200,1258291200,1258291200]
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; SSE2-NEXT: por %[[LOWCST]], [[VECLOW]]
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; SSE2-NEXT: psrld $16, %xmm0
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; SSE2-NEXT: movdqa {{.*#+}} [[HIGHCST:xmm[0-9]+]] = [1392508928,1392508928,1392508928,1392508928]
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; SSE2-NEXT: por %[[HIGHCST]], %xmm0
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; SSE2-NEXT: movaps {{.*#+}} [[MAGICCST:xmm[0-9]+]] = [5.49764202E+11,5.49764202E+11,5.49764202E+11,5.49764202E+11]
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; SSE2-NEXT: subps %[[MAGICCST]], %xmm0
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; SSE2-NEXT: addps [[VECLOW]], %xmm0
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; MASK is the low vector of the second part after this point.
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; SSE2-NEXT: pand %xmm1, %[[MASK]]
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; SSE2-NEXT: por %[[LOWCST]], %[[MASK]]
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; SSE2-NEXT: psrld $16, %xmm1
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; SSE2-NEXT: por %[[HIGHCST]], %xmm1
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; SSE2-NEXT: subps %[[MAGICCST]], %xmm1
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; SSE2-NEXT: addps %[[MASK]], %xmm1
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_uitofp_v8i32_to_v8f32:
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; SSE41: movdqa {{.*#+}} [[LOWCST:xmm[0-9]+]] = [1258291200,1258291200,1258291200,1258291200]
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; SSE41-NEXT: movdqa %xmm0, [[VECLOW:%xmm[0-9]+]]
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; SSE41-NEXT: pblendw $170, %[[LOWCST]], [[VECLOW]]
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; SSE41-NEXT: psrld $16, %xmm0
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; SSE41-NEXT: movdqa {{.*#+}} [[HIGHCST:xmm[0-9]+]] = [1392508928,1392508928,1392508928,1392508928]
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; SSE41-NEXT: pblendw $170, %[[HIGHCST]], %xmm0
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; SSE41-NEXT: movaps {{.*#+}} [[MAGICCST:xmm[0-9]+]] = [5.49764202E+11,5.49764202E+11,5.49764202E+11,5.49764202E+11]
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; SSE41-NEXT: subps %[[MAGICCST]], %xmm0
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; SSE41-NEXT: addps [[VECLOW]], %xmm0
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; LOWCST is the low vector of the second part after this point.
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; The operands of the blend are inverted because we reuse xmm1
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; in the next shift.
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; SSE41-NEXT: pblendw $85, %xmm1, %[[LOWCST]]
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; SSE41-NEXT: psrld $16, %xmm1
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; SSE41-NEXT: pblendw $170, %[[HIGHCST]], %xmm1
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; SSE41-NEXT: subps %[[MAGICCST]], %xmm1
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; SSE41-NEXT: addps %[[LOWCST]], %xmm1
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; SSE41-NEXT: retq
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;
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; Test that we are not lowering uinttofp to scalars
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; AVX-NOT: cvtsd2ss
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; AVX: retq
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;
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; AVX2-LABEL: test_uitofp_v8i32_to_v8f32:
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; AVX2: vpbroadcastd [[LOWCSTADDR]](%rip), [[LOWCST:%ymm[0-9]+]]
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; AVX2-NEXT: vpblendw $170, [[LOWCST]], %ymm0, [[LOWVEC:%ymm[0-9]+]]
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; AVX2-NEXT: vpsrld $16, %ymm0, [[SHIFTVEC:%ymm[0-9]+]]
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; AVX2-NEXT: vpbroadcastd [[HIGHCSTADDR]](%rip), [[HIGHCST:%ymm[0-9]+]]
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; AVX2-NEXT: vpblendw $170, [[HIGHCST]], [[SHIFTVEC]], [[HIGHVEC:%ymm[0-9]+]]
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; AVX2-NEXT: vbroadcastss [[MAGICCSTADDR]](%rip), [[MAGICCST:%ymm[0-9]+]]
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; AVX2-NEXT: vsubps [[MAGICCST]], [[HIGHVEC]], [[TMP:%ymm[0-9]+]]
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; AVX2-NEXT: vaddps [[TMP]], [[LOWVEC]], %ymm0
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: test_uitofp_v8i32_to_v8f32:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: # kill
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; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
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; AVX512F-NEXT: # kill
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; AVX512F-NEXT: retq
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;
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; AVX512VL-LABEL: test_uitofp_v8i32_to_v8f32:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vcvtudq2ps %ymm0, %ymm0
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; AVX512VL-NEXT: retq
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%tmp = uitofp <8 x i32> %arg to <8 x float>
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ret <8 x float> %tmp
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}
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