llvm-project/llvm/test/CodeGen
Luo, Yuanke 5fb4134210 [X86][DAGISel] Don't widen shuffle element with AVX512
Currently the X86 shuffle lowering would widen the element type for
shuffle if the mask element value is adjacent. For below example

  %t2 = add nsw <16 x i32> %t0, %t1
  %t3 = sub nsw <16 x i32> %t0, %t1
  %t4 = shufflevector <16 x i32> %t2, <16 x i32> %t3,
                      <16 x i32> <i32 16, i32 17, i32 2, i32 3, i32 4,
                       i32 5, i32 6, i32 7, i32 8, i32 9, i32 10,
                       i32 11, i32 12, i32 13, i32 14, i32 15>

  ret <16 x i32> %t4

Compiler would transform the shuffle to
  %t4 = shufflevector <8 x i64> %t2, <8 x i64> %t3,
                      <8 x i64> <i32 8, i32 1, i32 2, i32 3, i32 4,
                                 i32 5, i32 6, i32 7>
This may lose the oppotunity to let ISel select mask instruction when
avx512 is enabled.

This patch is to prevent the tranform when avx512 feature is enabled.
Thank Simon for the idea.

Differential Revision: https://reviews.llvm.org/D129537
2022-07-26 11:56:03 +08:00
..
AArch64 [GlobalISel] Fix miscompile of G_UREM + G_UDIV due to not checking for equality 2022-07-25 16:03:05 -07:00
AMDGPU RegAllocGreedy: Add a command line flag for reverseLocalAssignment 2022-07-25 15:47:15 -04:00
ARC
ARM [ARM] Fix Thumb2 compare being emitted ExpandCMP_SWAP 2022-07-20 12:04:22 +01:00
AVR
BPF [BPF] Handle anon record for CO-RE relocations 2022-07-13 15:16:16 -07:00
CSKY [CSKY] Fix the testcase error due to the verifyInstructionPredicates 2022-07-21 15:53:50 +08:00
DirectX [NFC] [DirectX] Cleanup test for comput_ids. 2022-07-07 14:02:32 -07:00
Generic [VP] IR expansion pass for VP gather and scatter 2022-07-18 17:00:38 +02:00
Hexagon recommit "[DAGCombiner] Teach scalarizeBinOpOfSplats handle scalable splat." 2022-07-21 17:34:34 +08:00
Inputs
Lanai
LoongArch [LoongArch] Support load/store of dso_local PIC global values 2022-07-21 19:37:56 -07:00
M68k [SelectionDAG] computeKnownBits / ComputeNumSignBits for the remaining overflow-aware nodes 2022-07-08 09:19:19 +01:00
MIR [amdgpu] Implement lds kernel id intrinsic 2022-07-19 17:46:19 +01:00
MLRegalloc
MSP430
Mips [DAG] SimplifyDemandedBits - relax "xor (X >> ShiftC), XorC --> (not X) >> ShiftC" to match only demanded bits 2022-07-19 10:59:07 +01:00
NVPTX [NVPTX] Promote i24, i40, i48 and i56 to next power-of-two register when passing 2022-07-22 14:14:12 -07:00
PowerPC [LegacyPM] Remove {,PostInline}EntryExitInstrumenterPass 2022-07-23 15:30:15 -07:00
RISCV [DAGCombiner] Teach scalarizeExtractedBinop to support scalable splat. 2022-07-26 09:31:45 +08:00
SPARC [SDAG] try to replace subtract-from-constant with xor 2022-07-08 08:14:24 -04:00
SPIRV [SPIRV] add SPIRVPrepareFunctions pass and update other passes 2022-07-22 04:00:48 +03:00
SystemZ Reland "[SystemZ][z/OS] Fix f32 variadic argument assertion" 2022-07-18 14:25:17 -04:00
Thumb
Thumb2 [ARM] Fix Thumb2 compare being emitted ExpandCMP_SWAP 2022-07-20 12:04:22 +01:00
VE [VE] Support load/store/spill of vector mask registers 2022-07-19 10:29:21 +09:00
WebAssembly [WebAssembly] Use `localexec` as default TLS model for non-Emscripten targets 2022-07-25 13:25:46 -07:00
WinCFGuard
WinEH
X86 [X86][DAGISel] Don't widen shuffle element with AVX512 2022-07-26 11:56:03 +08:00
XCore