llvm-project/llvm/lib/Target/MSP430
David Green 3e0bf1c7a9 [CodeGen] Move instruction predicate verification to emitInstruction
D25618 added a method to verify the instruction predicates for an
emitted instruction, through verifyInstructionPredicates added into
<Target>MCCodeEmitter::encodeInstruction. This is a very useful idea,
but the implementation inside MCCodeEmitter made it only fire for object
files, not assembly which most of the llvm test suite uses.

This patch moves the code into the <Target>_MC::verifyInstructionPredicates
method, inside the InstrInfo.  The allows it to be called from other
places, such as in this patch where it is called from the
<Target>AsmPrinter::emitInstruction methods which should trigger for
both assembly and object files. It can also be called from other places
such as verifyInstruction, but that is not done here (it tends to catch
errors earlier, but in reality just shows all the mir tests that have
incorrect feature predicates). The interface was also simplified
slightly, moving computeAvailableFeatures into the function so that it
does not need to be called externally.

The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently
show errors in the test-suite, so have been disabled with FIXME
comments.

Recommitted with some fixes for the leftover MCII variables in release
builds.

Differential Revision: https://reviews.llvm.org/D129506
2022-07-14 09:33:28 +01:00
..
AsmParser Cleanup MCParser headers 2022-02-11 10:39:29 +01:00
Disassembler Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h` 2022-05-15 08:44:58 +08:00
MCTargetDesc [CodeGen] Move instruction predicate verification to emitInstruction 2022-07-14 09:33:28 +01:00
TargetInfo
CMakeLists.txt
MSP430.h
MSP430.td
MSP430AsmPrinter.cpp [CodeGen] Move instruction predicate verification to emitInstruction 2022-07-14 09:33:28 +01:00
MSP430BranchSelector.cpp
MSP430CallingConv.td
MSP430FrameLowering.cpp [NFC] Use Register instead of unsigned 2022-01-19 20:17:04 +08:00
MSP430FrameLowering.h
MSP430ISelDAGToDAG.cpp [iwyu] Fix some header include regression 2022-04-05 15:02:03 +02:00
MSP430ISelLowering.cpp MSP430: Avoid using getPointerSize/getPointerTy 2022-03-31 18:49:22 -04:00
MSP430ISelLowering.h
MSP430InstrFormats.td
MSP430InstrInfo.cpp [Target] Use MachineBasicBlock::erase (NFC) 2022-06-04 22:41:24 -07:00
MSP430InstrInfo.h
MSP430InstrInfo.td
MSP430MCInstLower.cpp [Target] Use range-based for loops (NFC) 2021-11-27 11:16:19 -08:00
MSP430MCInstLower.h
MSP430MachineFunctionInfo.cpp llvm-reduce: Add cloning of target MachineFunctionInfo 2022-06-07 10:14:48 -04:00
MSP430MachineFunctionInfo.h llvm-reduce: Add cloning of target MachineFunctionInfo 2022-06-07 10:14:48 -04:00
MSP430RegisterInfo.cpp
MSP430RegisterInfo.h
MSP430RegisterInfo.td
MSP430Subtarget.cpp [Target] Remove redundant member initialization (NFC) 2022-01-06 22:01:44 -08:00
MSP430Subtarget.h
MSP430TargetMachine.cpp Don't use Optional::hasValue (NFC) 2022-06-20 11:49:10 -07:00
MSP430TargetMachine.h
README.txt

README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: This backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.