| .. |
|
out-of-range-fixups
|
…
|
|
|
dwarf-asm-no-code.s
|
…
|
|
|
error.s
|
[AVR] Reject/Reserve R0~R15 on AVRTiny.
|
2022-03-24 02:33:51 +00:00 |
|
hex-immediates.s
|
[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex
|
2020-07-12 08:14:52 -07:00 |
|
inst-adc.s
|
…
|
|
|
inst-add.s
|
…
|
|
|
inst-adiw.s
|
[AVR] Disassemble double register instructions
|
2020-06-23 02:18:04 +02:00 |
|
inst-and.s
|
…
|
|
|
inst-andi.s
|
…
|
|
|
inst-asr.s
|
…
|
|
|
inst-bld.s
|
…
|
|
|
inst-brbc.s
|
…
|
|
|
inst-brbs.s
|
…
|
|
|
inst-break.s
|
…
|
|
|
inst-bst.s
|
…
|
|
|
inst-call.s
|
…
|
|
|
inst-cbi.s
|
…
|
|
|
inst-cbr.s
|
…
|
|
|
inst-clr.s
|
…
|
|
|
inst-com.s
|
…
|
|
|
inst-cp.s
|
…
|
|
|
inst-cpc.s
|
…
|
|
|
inst-cpi.s
|
…
|
|
|
inst-cpse.s
|
…
|
|
|
inst-dec.s
|
…
|
|
|
inst-des.s
|
…
|
|
|
inst-eicall.s
|
…
|
|
|
inst-eijmp.s
|
…
|
|
|
inst-elpm.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
inst-eor.s
|
…
|
|
|
inst-family-cond-branch.s
|
…
|
|
|
inst-family-set-clr-flag.s
|
…
|
|
|
inst-fmul.s
|
…
|
|
|
inst-fmuls.s
|
…
|
|
|
inst-fmulsu.s
|
…
|
|
|
inst-icall.s
|
…
|
|
|
inst-ijmp.s
|
…
|
|
|
inst-in.s
|
…
|
|
|
inst-inc.s
|
…
|
|
|
inst-jmp.s
|
…
|
|
|
inst-lac.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
inst-las.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
inst-lat.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
inst-ld.s
|
[MC][AVR] Implement decoding ST/LD
|
2022-05-05 01:53:59 +00:00 |
|
inst-ldd.s
|
[MC][AVR] Implement decoding STD/LDD
|
2022-05-05 01:53:49 +00:00 |
|
inst-ldi.s
|
…
|
|
|
inst-lds.s
|
…
|
|
|
inst-lpm.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
inst-lsl.s
|
…
|
|
|
inst-lsr.s
|
…
|
|
|
inst-mov.s
|
…
|
|
|
inst-movw.s
|
[AVR] Disassemble double register instructions
|
2020-06-23 02:18:04 +02:00 |
|
inst-mul.s
|
…
|
|
|
inst-muls.s
|
…
|
|
|
inst-mulsu.s
|
…
|
|
|
inst-neg.s
|
…
|
|
|
inst-nop.s
|
…
|
|
|
inst-or.s
|
…
|
|
|
inst-ori.s
|
…
|
|
|
inst-out.s
|
…
|
|
|
inst-pop.s
|
…
|
|
|
inst-push.s
|
…
|
|
|
inst-rcall.s
|
…
|
|
|
inst-ret.s
|
…
|
|
|
inst-reti.s
|
…
|
|
|
inst-rjmp.s
|
…
|
|
|
inst-rol.s
|
…
|
|
|
inst-ror.s
|
…
|
|
|
inst-sbc.s
|
…
|
|
|
inst-sbci.s
|
…
|
|
|
inst-sbi.s
|
…
|
|
|
inst-sbic.s
|
…
|
|
|
inst-sbis.s
|
…
|
|
|
inst-sbiw.s
|
[AVR] Disassemble double register instructions
|
2020-06-23 02:18:04 +02:00 |
|
inst-sbr.s
|
…
|
|
|
inst-sbrc.s
|
…
|
|
|
inst-sbrs.s
|
…
|
|
|
inst-ser.s
|
…
|
|
|
inst-sleep.s
|
…
|
|
|
inst-spm.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
inst-st.s
|
[MC][AVR] Implement decoding ST/LD
|
2022-05-05 01:53:59 +00:00 |
|
inst-std.s
|
[MC][AVR] Implement decoding STD/LDD
|
2022-05-05 01:53:49 +00:00 |
|
inst-sts.s
|
…
|
|
|
inst-sub.s
|
…
|
|
|
inst-subi.s
|
…
|
|
|
inst-swap.s
|
…
|
|
|
inst-tst.s
|
…
|
|
|
inst-wdr.s
|
…
|
|
|
inst-xch.s
|
[AVR] Disassemble instructions with fixed Z operand
|
2020-06-23 02:17:53 +02:00 |
|
lit.local.cfg
|
…
|
|
|
modifiers.s
|
…
|
|
|
registers.s
|
[AVR] Add register aliases XL, YH, etc
|
2021-03-03 15:36:05 +01:00 |
|
relocations-abs.s
|
…
|
|
|
relocations.s
|
[AVR] Fix global references to function symbols
|
2021-02-10 00:40:49 +13:00 |
|
symbol_relocation.s
|
…
|
|
|
syntax-reg-int-literal.s
|
…
|
|
|
syntax-reg-pair.s
|
…
|
|
