109 lines
4.1 KiB
C++
109 lines
4.1 KiB
C++
//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Sparc implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcFrameLowering.h"
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#include "SparcInstrInfo.h"
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#include "SparcMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const SparcInstrInfo &TII =
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*static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
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MachineBasicBlock::iterator MBBI = MBB.begin();
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DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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// Get the number of bytes to allocate from the FrameInfo
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int NumBytes = (int) MFI->getStackSize();
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if (SubTarget.is64Bit()) {
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// All 64-bit stack frames must be 16-byte aligned, and must reserve space
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// for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
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NumBytes += 128;
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// Frames with calls must also reserve space for 6 outgoing arguments
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// whether they are used or not. LowerCall_64 takes care of that.
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assert(NumBytes % 16 == 0 && "Stack size not 16-byte aligned");
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} else {
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// Emit the correct save instruction based on the number of bytes in
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// the frame. Minimum stack frame size according to V8 ABI is:
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// 16 words for register window spill
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// 1 word for address of returned aggregate-value
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// + 6 words for passing parameters on the stack
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// ----------
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// 23 words * 4 bytes per word = 92 bytes
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NumBytes += 92;
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// Round up to next doubleword boundary -- a double-word boundary
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// is required by the ABI.
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NumBytes = RoundUpToAlignment(NumBytes, 8);
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}
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NumBytes = -NumBytes;
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if (NumBytes >= -4096) {
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BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
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.addReg(SP::O6).addImm(NumBytes);
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} else {
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// Emit this the hard way. This clobbers G1 which we always know is
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// available here.
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unsigned OffHi = (unsigned)NumBytes >> 10U;
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BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
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// Emit G1 = G1 + I6
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BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
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.addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
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BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
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.addReg(SP::O6).addReg(SP::G1);
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}
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}
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void SparcFrameLowering::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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if (!hasReservedCallFrame(MF)) {
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MachineInstr &MI = *I;
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DebugLoc DL = MI.getDebugLoc();
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int Size = MI.getOperand(0).getImm();
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if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
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Size = -Size;
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const SparcInstrInfo &TII =
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*static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
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if (Size)
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BuildMI(MBB, I, DL, TII.get(SP::ADDri), SP::O6).addReg(SP::O6)
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.addImm(Size);
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}
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MBB.erase(I);
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}
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void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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const SparcInstrInfo &TII =
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*static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
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DebugLoc dl = MBBI->getDebugLoc();
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assert(MBBI->getOpcode() == SP::RETL &&
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"Can only put epilog before 'retl' instruction!");
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BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
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.addReg(SP::G0);
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}
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