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AArch64
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AArch64: TableGenerate system instruction operands.
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2016-07-05 21:23:04 +00:00 |
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AMDGPU
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[AMDGPU] fix ds_swizzle_b32 opcode for VI (bz 28371)
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2016-07-08 15:12:46 +00:00 |
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ARM
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[ARM] Accept conditional versions of BXNS and BLXNS
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2016-06-07 14:58:48 +00:00 |
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AsmParser
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Refactor and cleanup Assembly Parsing / Lexing
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2016-06-17 16:06:17 +00:00 |
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COFF
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[MC, COFF] Permit a variable to be redefined
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2016-07-08 21:54:16 +00:00 |
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Disassembler
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[SystemZ] Add support for missing instructions
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2016-07-08 16:18:40 +00:00 |
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ELF
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Add initial support for R_386_GOT32X.
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2016-07-06 21:19:11 +00:00 |
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Hexagon
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Remove redundant -mattr options from llvm-objdump commands.
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2016-06-16 15:47:19 +00:00 |
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Lanai
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[lanai] Treat .t as optional in assembly parser for RR operands and add predicate operand to ShiftRR
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2016-07-09 18:26:04 +00:00 |
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MachO
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CodeGen: Use PLT relocations for relative references to unnamed_addr functions.
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2016-04-22 20:40:10 +00:00 |
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Markup
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Mips
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[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions
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2016-06-27 08:23:28 +00:00 |
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PowerPC
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Add aliases for mfvrsave/mtvrsave.
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2016-06-09 23:27:48 +00:00 |
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Sparc
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Don't pass a Reloc::Model to MC.
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2016-05-18 11:58:50 +00:00 |
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SystemZ
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[SystemZ] Add support for the .word directive.
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2016-07-08 16:50:02 +00:00 |
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X86
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Permit memory operands in ins/outs instructions
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2016-06-29 19:54:27 +00:00 |
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